SM89516B datasheet(41/49 Pages) SYNCMOS

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SM89516B

8-Bit Micro-controller

64KB Flash

& 1KB RAM embedded

Specifications subject to change without notice contact your sales representatives for the most recent information.

ISSFD-M087

Ver D SM89516B 08/07/2015

- 41 -

Mnemonic

Description

Dir.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RST

Watchdog Timer

WDTC

Watchdog

Timer Control

9FH

WDTE

CLEAR

PS [2:0]

00H

SCONF

System Control

BFH

WDR

PDWUE

OME

ALEI

02H

Mnemonic: WDTC

Address: 9Fh

Reset

WDTE

CLEAR

PS [2:0]

00H

WDTE: Watch Dog Timer enable bit.

CLEAR: Watch Dog Timer clear bit.

If CLEAR bit set to1, setting this bit the Watchdog timer counter clear and re-start to

count from the Beginning.

PS[2:0]: Watch Dog timer over flow period setting.

Mnemonic: SCONF

Address: BFh

Reset

WDR

PDWUE

OME

ALEI

02H

WDR Watch Dog Timer Reset.

When system reset by Watch Dog Timer overflow, WDR will be set to 1.

User should check WDR bit whenever un-predicted reset happened.

SM89516B Datasheet(PDF) 41 Page - SyncMOS Technologies,Inc

SM89516B Datasheet(HTML) 41 Page - SyncMOS Technologies,Inc

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