Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

SM89516B Datasheet(PDF) 12 Page - SyncMOS Technologies,Inc

Part # SM89516B
Description  On-chip 768 bytes expanded RAM
PDF  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SYNCMOS [SyncMOS Technologies,Inc]
Direct Link  http://www.syncmos.com.tw
Logo SYNCMOS - SyncMOS Technologies,Inc

SM89516B Datasheet(HTML) 12 Page - SyncMOS Technologies,Inc

Back Button SM89516B Datasheet HTML 8Page - SyncMOS Technologies,Inc SM89516B Datasheet HTML 9Page - SyncMOS Technologies,Inc SM89516B Datasheet HTML 10Page - SyncMOS Technologies,Inc SM89516B Datasheet HTML 11Page - SyncMOS Technologies,Inc SM89516B Datasheet HTML 12Page - SyncMOS Technologies,Inc SM89516B Datasheet HTML 13Page - SyncMOS Technologies,Inc SM89516B Datasheet HTML 14Page - SyncMOS Technologies,Inc SM89516B Datasheet HTML 15Page - SyncMOS Technologies,Inc SM89516B Datasheet HTML 16Page - SyncMOS Technologies,Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 49 page
background image
SM89516B
8-Bit Micro-controller
64KB Flash
& 1KB RAM embedded
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M087
Ver D SM89516B 08/07/2015
- 12 -
Function Description
1.
General Features
SM89516B is an 8-bit micro-controller. All of its functions and the detailed meanings of SFR will be given in the
following sections.
1.1
Embedded Flash
The program can be loaded into the embedded 64KB Flash memory via its writer.
1.2
IO Pads
The SM89516B has Five I/O ports: Port 0, Port 1, Port 2, Port 3, Port 4. Port 0~Port 3 are 8-bit ports. Port 4 is 4-bit
port. These are: quasi-bidirectional (standard 8051 port outputs) with Port 1~4, and open drain with Port 0.
All the pads are with slew rate to reduce EMI. The IO pads can withstand ESD in human body mode guaranteeing
the SM89516B’s quality in high electro-static environments.
1.3
System Control Register (SCONF)
Mnemonic: SCONF
Address: BFh
7
6
5
4
3
2
1
0
Reset
WDR
-
-
PDWUE
-
-
OME
ALEI
02H
WDR: Watch Dog Timer Reset.
When system reset by Watch Dog Timer overflow, WDR will be set to 1.
User should check WDR bit whenever un-predicted reset happened.
PDWUE: Power down wake-up enable bit.
Set 1 to enable wake-up from power-down state by external pin int0 or int1.
OME: On-chip 768B expanded RAM enable bit.
Set 1 to enable on-chip 768B expanded RAM access.
ALEI: ALE output inhibit bit.
When default, It can inhibit the clock signal in (Fosc/6) Hz output to the ALE pin.
When set to 1, the ALE pin output will stop to reduce EMI.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com