DAC8750IPWPR datasheet(22/53 Pages) TI1

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CODE

IOUT

16mA •

4mA

CODE

IOUT

24mA •

CODE

IOUT

20mA •

DAC7750, DAC8750

SBAS538B – DECEMBER 2013 – REVISED JUNE 2016

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Product Folder Links: DAC7750 DAC8750

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Feature Description (continued)

For a 5-V reference, the output can be expressed as shown in Equation 1 through Equation 3.

For a 0-mA to 20-mA output range, use Equation 1.

(1)

For a 0-mA to 24-mA output range, use Equation 2.

(2)

For a 4-mA to 20-mA output range, use Equation 3.

where

•

CODE is the decimal equivalent of the code loaded to the DAC

•

N is the bits of resolution; 16 for DAC8750, and 12 for DAC7750

(3)

The current-output range is normally set according to the value of the RANGE bits in the Control Register (see

Setting Current-Output Ranges for more details).

8.3.3 Internal Reference

The DACx750 includes an integrated 5-V reference with a buffered output (REFOUT) capable of driving up to 5

mA (source or sink) with an initial accuracy of ±5 mV maximum and a temperature drift coefficient of 10 ppm/°C

maximum.

8.3.4 Digital Power Supply

An internally generated 4.6-V supply capable of driving up to 10 mA can be output on DVDD by leaving the

DVDD-EN terminal unconnected. This eases the system power supply design when an isolation barrier is

required to generate the digital supply. It can be used to drive isolation components used for the digital data lines

and other miscellaneous components like references and temp sensors; see Figure 62 for an example

application.

If an external supply is preferred, the DVDD terminal (which can be driven up to 5.5 V in this case) can become

an input by tying DVDD-EN to GND. See Electrical Characteristics for detailed specifications.

8.3.5 DAC Clear

The DAC has an asynchronous clear function through the CLR terminal that is active-high and allows the current

output to be cleared to zero-scale code. When the CLR signal returns to low, the output remains at the cleared

value. The preclear value can be restored by pulsing the LATCH signal without clocking any data. A new value

cannot be programmed until the CLR terminal returns to low. To avoid glitches on the output, disable the output

by writing a 0 to the OUTEN bit of the Control Register before changing the current range.

8.3.6 Power-Supply Sequence

The DACx750 has internal power on reset (POR) circuitry for both the digital DVDD and analog AVDD supplies.

This circuitry makes sure that the internal logic and power-on state of the DAC power up to the proper state,

independent of the supply sequence. While there is no required supply power-on sequence, the recommendation

is to first have the digital DVDD supply power on, followed by the analog AVDD supply.

DAC8750IPWPR Datasheet(PDF) 22 Page - Texas Instruments

DAC8750IPWPR Datasheet(HTML) 22 Page - Texas Instruments

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