DAC8750IPWPR datasheet(28/53 Pages) TI1

28 / 53 page

Time (200 µs/div)

no cap

3 nF CAP1

3 nF CAP2

10 nF CAP1

10 nF CAP2

C001

A = 25ºC

AVDD = 24 V

LOAD = 250 Ÿ

DAC7750, DAC8750

SBAS538B – DECEMBER 2013 – REVISED JUNE 2016

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Product Folder Links: DAC7750 DAC8750

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8.4.4 Filtering The Current Output

The DACx750 provides access to internal nodes of the circuit as shown in Figure 61. Place capacitors on these

terminals and AVDD to form a filter on the output current, reducing bandwidth and the slew rate of the output,

especially useful for driving inductive loads. However, to achieve large reductions in slew rate, use the

programmable slew rate to avoid having to use large capacitors. Even in that case, use the capacitors on CAP1

and CAP2 to smooth out the stairsteps caused by the digital code changes as shown in Figure 57. However,

note that power supply ripple also couples into the devices through these capacitors.

Figure 57. IOUT vs Time for Different Cap Values on CAP1 and CAP2

8.4.5 Output Current Monitoring

Many applications, especially for functional safety, require monitoring of the output current to ensure it stays

close to the programmed value. Place a sense resistor in series to the output to measure the voltage across it.

However, this resistor reduces the compliance voltage available for the load. The DACx750 provides access to

an internal precision resistor (R3 in Figure 53) through the R3-SENSE and BOOST terminals to perform analog

readback for monitoring the output current. Measure the voltage between the R3-SENSE and BOOST terminals

and divide by the value of the R3 resistor to determine the magnitude of the output current. The R3 resistor has a

typical value of 40 Ω (see Figure 39 for a plot of resistance versus temperature) with a temperature drift

coefficient of 40 ppm/°C (see Figure 40 for a histogram of R3 resistance temperature drift). The R3 resistor is

tested to stay within the minimum (36 Ω) and maximum (44 Ω) resistance values shown in the R3 Resistor

section of Electrical Characteristics. To remove the tolerance error, perform a simple calibration by programming

a certain value of output current, measuring the voltage across R3-SENSE and BOOST, and calculating the

exact value of R3.

8.4.6 HART Interface

On the DACx750, HART digital communication can be modulated onto the input signal by the methods shown in

the following subsections. For more detail, see Implementing HART Communication with the DAC8760 Family.

8.4.6.1 Implementing HART in 4-mA to 20-mA Mode

This method is limited to the case where the RANGE bits of the Control Register are programmed to the 4-mA to

20-mA range. Some applications require going beyond the 4-mA to 20-mA range. In those cases, refer to the

methods described in the next subsection.

The external HART signal (ac voltage; 500 mVPP, 1200 Hz, and 2200 Hz) can be capacitively coupled in through

the HART-IN terminal and transferred to a current that is superimposed on the 4-mA to 20-mA current output.

The HART-IN terminal has a typical input impedance of 35 kΩ that together with the input capacitor used to

couple the external HART signal, forms a filter to attenuate frequencies beyond the HART band-pass region. In

addition to this filter, an external passive filter is recommended to complete the filtering requirements of the

HART specifications. Figure 58 illustrates the output current versus time operation for a typical HART signal.

Table 6 specifies the performance of the HART-IN terminal.

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