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TMS320C6745DPTP3 Datasheet(PDF) 30 Page - Texas Instruments |
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TMS320C6745DPTP3 Datasheet(HTML) 30 Page - Texas Instruments |
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30 / 227 page  TMS320C6745, TMS320C6747 SPRS377F – SEPTEMBER 2008 – REVISED JUNE 2014 www.ti.com Table 3-9. External Memory Interface A (EMIFA) Terminal Functions (continued) PIN NO SIGNAL NAME TYPE(1) PULL(2) MUXED DESCRIPTION PTP ZKB EMA_A[12]/LCD_MCLK/GP1[12] 42 N11 O IPU EMA_A[11] /LCD_AC_ENB_CS/GP1[11] 41 P11 O IPU EMA_A[10]/LCD_VSYNC/GP1[10] 27 N8 O IPU EMA_A[9]/LCD_HSYNC/GP1[9] 40 R11 O IPU EMA_A[8]/LCD_PCLK/GP1[8] 39 T11 O IPU LCD, GPIO EMIFA address bus EMA_A[7]/LCD_D[0]/GP1[7] 37 N10 O IPD EMA_A[6]/LCD_D[1]/GP1[6] 36 P10 O IPD EMA_A[5]/LCD_D[2]/GP1[5] 35 R10 O IPD EMA_A[4]/LCD_D[3]/GP1[4] 34 T10 O IPD EMA_A[3]/LCD_D[6]/GP1[3] 32 N9 O IPD EMA_A[2]/MMCSD_CMD/UHPI_HCNTL1/GP1[2] 31 P9 O IPU MMCSD, UHPI, GPIO EMA_A[1]/MMCSD_CLK/UHPI_HCNTL0/GP1[1] 30 R9 O IPU EMIFA address bus EMA_A[0]/LCD_D[7]/GP1[0] 29 T9 O IPD LCD, GPIO LCD, UHPI, EMA_BA[1]/LCD_D[5]/UHPI_HHWIL/GP1[13] 26 P8 O IPU GPIO EMIFA bank address EMA_BA[0]/LCD_D[4]/GP1[14] 25 R8 O IPU LCD, GPIO McASP2, EMA_CLK/OBSCLK/AHCLKR2/GP1[15] - R12 O IPU EMIFA clock GPIO EMIFA SDRAM clock EMA_SDCKE/GP2[0] - T12 O IPU GPIO enable EMIFA SDRAM row EMA_RAS/EMA_CS[5]/GP2[2] - N7 O IPU address strobe EMIF A chip EMIFA SDRAM select, GPIO EMA_CAS/EMA_CS[4]/GP2[1] - L16 O IPU column address strobe EMA_RAS/EMA_CS[5] /GP2[2] - N7 O IPU EMIF A SDRAM, GPIO EMA_CAS/EMA_CS[4] /GP2[1] - L16 O IPU EMIFA Async Chip McASP2, EMA_CS[3]/AMUTE2/GP2[6] 21 T7 O IPU Select GPIO UHPI, GPIO, EMA_CS[2]/UHPI_HCS/GP2[5]/BOOT[15] 23 P7 O IPU BOOT EMIFA SDRAM chip EMA_CS[0]/UHPI_HAS/GP2[4] - T8 O IPU UHPI, GPIO select UHPI, EMIFA SDRAM write EMA_WE/UHPI_HRW/AXR0[12]/GP2[3]/BOOT[14] 55 M13 O IPU MCASP0, enable GOPIO, BOOT EMIFA write EMA_WE_DQM[1] /UHPI_HDS2/AXR0[14]/GP2[8] - P12 O IPU enable/data mask for EMA_D[15:8] UHPI, McASP, GPIO EMIFA write EMA_WE_DQM[0] /UHPI_HINT/AXR0[15]/GP2[9] - M14 O IPU enable/data mask for EMA_D[7:0] UHPI, EMA_OE/UHPI_HDS1/AXR0[13]/GP2[7] 22 R7 O IPU McASP0, EMIFA output enable GPIO EMIFA wait EMA_WAIT[0]/ UHPI_HRDY/GP2[10] 19 N6 I IPU UHPI, GPIO input/interrupt 30 Device Overview Copyright © 2008–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS320C6745 TMS320C6747 |
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