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TMS320C6745DPTP3 Datasheet(PDF) 67 Page - Texas Instruments |
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TMS320C6745DPTP3 Datasheet(HTML) 67 Page - Texas Instruments |
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67 / 227 page ![]() OSCIN RESET RESETOUT BootPins Config Power Supplies Ramping PowerSuppliesStable ClockSourceStable 1 2 3 4 TRST TMS320C6745, TMS320C6747 www.ti.com SPRS377F – SEPTEMBER 2008 – REVISED JUNE 2014 • The RTC peripheral is not reset during a warm reset. A software sequence is required to reset the RTC. 6.4.3 Reset Electrical Data Timings Table 6-1 assumes testing over the recommended operating conditions. Table 6-1. Reset Timing Requirements(1)(2) No. MIN MAX UNIT 1 tw(RSTL) Pulse width, RESET/TRST low 100 ns 2 tsu(BPV-RSTH) Setup time, boot pins valid before RESET/TRST high 20 ns 3 th(RSTH-BPV) Hold time, boot pins valid after RESET/TRST high 20 ns 4 td(RSTH- RESET high to RESETOUT high; Warm reset 4096 cycles(3) RESETOUTH) RESET high to RESETOUT high; Power-on Reset 6192 (1) RESETOUT is multiplexed with other pin functions. See the Terminal Functions table, Table 3-6 for details. (2) For power-on reset (POR), the reset timings in this table refer to RESET and TRST together. For warm reset, the reset timings in this table refer to RESET only (TRST is held high). (3) OSCIN cycles. Figure 6-4. Power-On Reset (RESET and TRST active) Timing Copyright © 2008–2014, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 67 Submit Documentation Feedback Product Folder Links: TMS320C6745 TMS320C6747 |
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