TMS320C6745DPTP3 datasheet(31/227 Pages) TI1

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TMS320C6745, TMS320C6747

www.ti.com

SPRS377F – SEPTEMBER 2008 – REVISED JUNE 2014

3.6.5

External Memory Interface B (only SDRAM)

Table 3-10. External Memory Interface B (EMIFB) Terminal Functions

PIN NO

SIGNAL NAME

TYPE(1)

PULL(2)

MUXED

DESCRIPTION

PTP

ZKB

EMB_D[31]

G14

I/O

IPD

EMB_D[30]

F15

I/O

IPD

EMB_D[29]

F14

I/O

IPD

EMB_D[28]

E15

I/O

IPD

EMB_D[27]

E14

I/O

IPD

EMB_D[26]

A14

I/O

IPD

EMB_D[25]

B14

I/O

IPD

EMB_D[24]

A13

I/O

IPD

EMB_D[23]

L15

I/O

IPD

EMB_D[22]

L14

I/O

IPD

EMB_D[21]

K16

I/O

IPD

EMB_D[20]

K13

I/O

IPD

EMB_D[19]

J14

I/O

IPD

EMB_D[18]

H15

I/O

IPD

EMB_D[17]

H14

I/O

IPD

EMB_D[16]

G15

I/O

IPD

EMIFB SDRAM data bus

EMB_D[15]/GP6[15]

F13

I/O

IPD

EMB_D[14]/GP6[14]

E16

I/O

IPD

EMB_D[13]/GP6[13]

E13

I/O

IPD

EMB_D[12]/GP6[12]

D16

I/O

IPD

EMB_D[11]/GP6[11]

D15

I/O

IPD

EMB_D[10]/GP6[10]

D14

I/O

IPD

EMB_D[9]/GP6[9]

D13

I/O

IPD

EMB_D[8]/GP6[8]

C16

I/O

IPD

GPIO

EMB_D[7]/GP6[7]

J16

I/O

IPD

EMB_D[6]/GP6[6]

J15

I/O

IPD

EMB_D[5]/GP6[5]

J13

I/O

IPD

EMB_D[4]/GP6[4]

H16

I/O

IPD

EMB_D[3]/GP6[3]

H13

I/O

IPD

EMB_D[2]/GP6[2]

G16

I/O

IPD

EMB_D[1]/GP6[1]

G13

I/O

IPD

EMB_D[0]/GP6[0]

F16

I/O

IPD

EMB_A[12]/GP3[13]

B15

IPD

EMB_A[11]/GP7[13]

B12

IPD

EMB_A[10]/GP7[12]

105

IPD

EMB_A[9]/GP7[11]

C12

IPD

EMIFB SDRAM row/column

GPIO

address bus

EMB_A[8]/GP7[10]

D12

IPD

EMB_A[7]/GP7[9]

A11

IPD

EMB_A[6]/GP7[8]

B11

IPD

EMB_A[5]/GP7[7]

C11

IPD

(1)

I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.

Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name

highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured

function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different

types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.

(2)

IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor

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