TMS320C6745DPTP3 datasheet(85/227 Pages) TI1

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TMS320C6745, TMS320C6747

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SPRS377F – SEPTEMBER 2008 – REVISED JUNE 2014

Table 6-13. EDMA3 Transfer Controller (EDMA3TC) Registers (continued)

Transfer Controller 0

Transfer Controller 1

ACRONYM

BYTE ADDRESS

0x01C0 8314

0x01C0 8714

DFMPPRXY0

Destination FIFO Memory Protection Proxy Register 0

0x01C0 8340

0x01C0 8740

DFOPT1

Destination FIFO Options Register 1

0x01C0 8344

0x01C0 8744

DFSRC1

Destination FIFO Source Address Register 1

0x01C0 8348

0x01C0 8748

DFCNT1

Destination FIFO Count Register 1

0x01C0 834C

0x01C0 874C

DFDST1

Destination FIFO Destination Address Register 1

0x01C0 8350

0x01C0 8750

DFBIDX1

Destination FIFO B-Index Register 1

0x01C0 8354

0x01C0 8754

DFMPPRXY1

Destination FIFO Memory Protection Proxy Register 1

0x01C0 8380

0x01C0 8780

DFOPT2

Destination FIFO Options Register 2

0x01C0 8384

0x01C0 8784

DFSRC2

Destination FIFO Source Address Register 2

0x01C0 8388

0x01C0 8788

DFCNT2

Destination FIFO Count Register 2

0x01C0 838C

0x01C0 878C

DFDST2

Destination FIFO Destination Address Register 2

0x01C0 8390

0x01C0 8790

DFBIDX2

Destination FIFO B-Index Register 2

0x01C0 8394

0x01C0 8794

DFMPPRXY2

Destination FIFO Memory Protection Proxy Register 2

0x01C0 83C0

0x01C0 87C0

DFOPT3

Destination FIFO Options Register 3

0x01C0 83C4

0x01C0 87C4

DFSRC3

Destination FIFO Source Address Register 3

0x01C0 83C8

0x01C0 87C8

DFCNT3

Destination FIFO Count Register 3

0x01C0 83CC

0x01C0 87CC

DFDST3

Destination FIFO Destination Address Register 3

0x01C0 83D0

0x01C0 87D0

DFBIDX3

Destination FIFO B-Index Register 3

0x01C0 83D4

0x01C0 87D4

DFMPPRXY3

Destination FIFO Memory Protection Proxy Register 3

Table 6-14 shows an abbreviation of the set of registers which make up the parameter set for each of 128

EDMA events. Each of the parameter register sets consist of 8 32-bit word entries. Table 6-15 shows the

parameter set entry registers with relative memory address locations within each of the parameter sets.

Table 6-14. EDMA Parameter Set RAM

BYTE ADDRESS RANGE

DESCRIPTION

0x01C0 4000 - 0x01C0 401F

Parameters Set 0 (8 32-bit words)

0x01C0 4020 - 0x01C0 403F

Parameters Set 1 (8 32-bit words)

0x01C0 4040 - 0x01cC0 405F

Parameters Set 2 (8 32-bit words)

0x01C0 4060 - 0x01C0 407F

Parameters Set 3 (8 32-bit words)

0x01C0 4080 - 0x01C0 409F

Parameters Set 4 (8 32-bit words)

0x01C0 40A0 - 0x01C0 40BF

Parameters Set 5 (8 32-bit words)

...

0x01C0 4FC0 - 0x01C0 4FDF

Parameters Set 126 (8 32-bit words)

0x01C0 4FE0 - 0x01C0 4FFF

Parameters Set 127 (8 32-bit words)

Table 6-15. Parameter Set Entries

BYTE OFFSET ADDRESS

ACRONYM

PARAMETER ENTRY

WITHIN THE PARAMETER SET

0x0000

OPT

Option

0x0004

SRC

Source Address

0x0008

A_B_CNT

A Count, B Count

0x000C

DST

Destination Address

0x0010

SRC_DST_BIDX

Source B Index, Destination B Index

0x0014

LINK_BCNTRLD

Link Address, B Count Reload

0x0018

SRC_DST_CIDX

Source C Index, Destination C Index

0x001C

CCNT

C Count

Peripheral Information and Electrical Specifications

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