MT9072AB datasheet(68/275 Pages) ZARLINK

68 / 275 page

MT9072

Data Sheet

Zarlink Semiconductor Inc.

mask is located in register Y46 bit 4 (clear to enable interrupt); and the CASRI interrupt status bit in register is Y36

bit 4. Any channels marked as clear channels will not generate an interrupt due to changes in ABCD bits.

8.2.2.1

E1 Channel Associated Signaling (CAS) Transmit from ST-BUS CSTi to PCM30

Table 25 shows the detailed bit mapping of CSTi timeslots to transmit PCM30 frames.

8.2.2.2

E1 Channel Associated Signaling (CAS) Receive from PCM30 to ST-BUS CSTo

Table 26 shows the detailed bit mapping of CSTo timeslots from receive PCM30 frames.

Frame

ST-BUS CSTi

PCM30 Transmit

Timeslot

Data Bits (B7-B0)

Timeslot

Data Bits (B1-B8)

0 + n

not used.

CAS Multiframe Alignment Signal

1m + n to

15m + n

#,#,#,#,A1, B1, C1, D1 to

#,#,#,#,A15, B15, C15, D15

16m + n

not used.

17m + n to

31m + n

#,#,#,#,A16, B16, C16, D16, to

#,#,#,#,A30, B30, C30, D30

1 to 15

as above as above

A1, B1, C1, D1, A16, B16, C16, D16 to

A15, B15, C15, D15, A30, B30, C30, D30

Note 1. For 2.048 Mbit/s operation, m=1 and n=0.

Note 2. For 8.192 Mbit/s operation, m=4 and n =0,1,2,3 where n corresponds to the framer number (i.e., n=0=framer 0... n=3= framer

Note 3. The number following the ABCD signaling bit letter designates the channel number (i.e., A30 designates channel 30).

Note 4. For these functions to be valid, CAS mode must be selected (CSIG=0 register address Y03), and the required ST-BUS

channels must be enabled (CASS=0 of register address Y90-YAF).

Note 5. # indicates data which is not transmitted.

Table 25 - Transmit PCM30 CAS Channels 1 to 30 from ST-BUS 2.048 Mbit/s or 8.192 Mbit/s CSTi (E1)

CAS

Frame

ST-BUS CSTo

PCM30 Receive

Timeslot

Data Bits (B7-B0)

Timeslot

Data Bits (B1-B8)

0 + n

not used.

CAS Multiframe Alignment Signal

1m + n to

15m + n

1,1,1,1,A1, B1, C1, D1, to

1,1,1,1,A15, B15, C15, D15

16m + n not used.

17m + n to

31m + n

1,1,1,1,A16, B16, C16, D16, to

1,1,1,1,A30, B30, C30, D30

1 to 15

as above as above

A1, B1, C1, D1, A16, B16, C16, D16 to

A15, B15, C15, D15, A30, B30, C30, D30

Note 1. For 2.048 Mbit/s operation, m=1 and n=0.

Note 2. For 8.192 Mbit/s operation, m=4 and n =0,1,2,3 where n corresponds to the framer number (i.e., n=0=framer 0... n=3= framer

3).

Note 3. The number following the ABCD signaling bit letter designates the channel number (i.e., A30 designates channel 30).

Note 4. For these functions to be valid, CAS mode must be selected (CSIG=0 register address Y03).

Note 5. “1” indicates bit positions in a logic high state.

Table 26 - Receive PCM30 CAS Channels 1 to 30 to ST-BUS 2.048 Mbits or 8.192 Mbits CSTo (E1)

MT9072AB Datasheet(PDF) 68 Page - Zarlink Semiconductor Inc

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