MT9072AB datasheet(92/275 Pages) ZARLINK

92 / 275 page

MT9072

Data Sheet

Zarlink Semiconductor Inc.

14.1.7

T1 Per Timeslot Trunk Conditioning

The per channel conditioning capabilities of MT9072 are explained in this section. For the receiver the T1 data can

be replaced by the conditioning data (Y09) via the bit MPDR in the per channel control registers(Y90 to YA7).

This data will be output to the corresponding DSTo channel. The received data can be inverted on a per channel

basis by setting the RPCI bit (register Y90 to YA7). The transmit data can be inverted on a per channel basis with a

write to the control bit TPCI (registers Y90 to YA7). The transmit data can also be frozen on a per channel basis; in

this case the data from the DSTI is not used to update the Transmit Memory and the data written in Y0A is used as

the source (MPDT in registers Y90 to YA7).

Secondary D4 Yellow Alarm. This bit is set if 2 consecutive’1’s are

received in the S-bit position of the 12th frame of the D4

superframe.

SECYEL

Y10

SECYELI

Y35

AIS Alarm. This bit is set if fewer than 5 zeros are received in a 3

millisecond window.

AIS

Y10

AISI

Y35

ESFYEL.This bit is set if the ESF yellow alarm 0000000011111111

is receive in eight or more codewords out of ten in Bit Oriented

Message of FDL.

ESFYEL

Y10

ESFYELI

Y35

T1DM Received Yellow Alarm. If "Y" bit of the T1DM

Synchronization Word is received

T1DRY

Y10

T1DMYI

Y35

Transmit ESF Yellow Alarm. Setting this bit (while in ESF mode)

causes a repeating pattern of eight 1’s followed by eight 0’s to be

insert onto the transmit FDL.

TESFYEL

Y02

Transmit Secondary D4 Yellow Alarm. Setting this bit (in D4

mode) causes the S-bit of transmit frame 12 to be set.

TSECY

Y02

Transmit All Ones. When low, this control bit forces a framed or

unframed (depending on the state of Transmit Alarm Control bit 0)

all ones to be transmit at TTIP and TRING

TAIS

Y02

S-bit Override. If set, this bit forces the S-bits to be inserted as an

overlay on any of the following alarm conditions: i) transmit all ones,

ii) loop up code insertion, iii) loop down code insertion.

Y02

TT1DMY. If reset to low a yellow alarm is sent in the 24th channel if

the T1DM option is set.

TT1DMY

Y02

Control/Status Register

Interrupt Status

Description

Bit

Address

Bit

Address

Table 46 - Alarm Control and Status Bits (T1)

MT9072AB Datasheet(PDF) 92 Page - Zarlink Semiconductor Inc

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