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BLUENRG-1 Datasheet(PDF) 14 Page - STMicroelectronics |
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BLUENRG-1 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 173 page ![]() Functional details BlueNRG-1 14/173 DocID028866 Rev 1 3 Functional details The BlueNRG-1 integrates the blocks listed below: Cortex M0 core Interrupts management 160 KB Flash memory 24 KB of RAM with two retention options (12 KB or 24 KB) Power management Clocks Bluetooth low energy radio Random number generator (RNG) (it is reserved to Bluetooth low energy protocol stack, but user application can read it) Public Key Cryptography (PKA) (reserved to Bluetooth low energy protocol stack) Peripherals: SPI interface UART interface I2C bus interface GPIO Multifunction timer DMA controller Watchdog RTC ADC with battery indicator PDM stream processor The main blocks are described in the following subsection. 3.1 Core The ARM® Cortex® -M0 processor has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced system response to interrupts. The ARM® Cortex® -M0 32-bit RISC processor features exceptional code-efficiency, delivering the high-performance expected from an ARM core in the memory size usually associated with 8-bit and 16-bit devices. The BlueNRG-1 has an embedded ARM core and is therefore compatible with all ARM tools and software. 3.2 Interrupts The Cortex-M0 nested vector interrupt controller (NVIC) handles interrupts. The NVIC controls specific Cortex-M0 interrupts (address 0x00 to 0x3C) as well as 32-user interrupts (address 0x40 to 0xBC). In the BlueNRG-1 device, the user interrupts are connected to the interrupt signals of the different peripherals. |
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