BLUENRG-1 datasheet(48/173 Pages) STMICROELECTRONICS

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Functional details

BlueNRG-1

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DocID028866 Rev 1

Table 41: DMA_CHx - CCR register description: address offset DMA_CHX_BASE_ADDR+0x00

Bit

Field name

Reset

Description

0x0

DMA channel enable.

0: DMA channel disabled.

1: DMA channel enabled.

TCIE

0x0

Transfer complete interrupt enable.

0: TC interrupt disabled.

1: TC interrupt enabled.

HTIE

0x0

Half transfer interrupt enable.

0: HT interrupt disabled.

1: HT interrupt enabled.

TEIE

0x0

Transfer error interrupt enable.

0: TE interrupt disabled.

1: TE interrupt enabled.

DIR

0x0

Data transfer direction.

0: Read from peripheral.

1: Read from memory.

CIRC

0x0

Circular mode.

0: Circular mode disabled.

1: Circular mode enabled.

PINC

0x0

Peripheral increment mode.

0: Peripheral increment disabled.

1: Peripheral increment enabled.

MINC

0x0

Memory increment mode.

0: Memory increment disabled.

1: Memory increment enabled.

9:8

PSIZE

0x0

Peripheral size.

00b: Size 8 bits.

01b: Size 16 bits.

10b: Size 32 bits.

11:10

MSIZE

0x0

Memory size.

00b: Size 8 bits.

01b: Size 16 bits.

10b: Size 32 bits.

13:12

0x0

Channel priority level.

00b: Low priority.

01b: Medium priority.

10b: High priority.

11b: Very high priority.

MEM2MEM

0x0

Memory to memory mode.

0: Memory to memory mode disabled.

0: Memory to memory mode enabled.

31:15

RESERVED

0x0

RESERVED

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