LAN91C111 datasheet(46/125 Pages) MICROCHIP

46 / 125 page

LAN91C111

DS00002276A-page 46

 2011-2016 Microchip Technology Inc.

8.10

Bank 0 - Receive/Phy Control Register

SPEED – Speed select Input. This bit is valid and selects 10/100 PHY operation only when the ANEG Bit = 0, this bit

overrides the SPEED bit in the PHY Register 0 (Control Register) and determine the speed mode. When this bit is set

(1), the Internal PHY will operate at 100Mbps. When this bit is cleared (0), the Internal PHY will operate at 10Mbps.

When the ANEG bit = 1, this bit is ignored and 10/100 operation is determined by the outcome of the Auto-Negotiation

or this bit is overridden by the SPEED bit in the PHY Register 0 (Control Register) when the ANEG_EN bit in the PHY

DPLX – Duplex Select - This bit selects Full/Half Duplex operation. This bit is valid and selects duplex operation only

when the ANEG Bit = 0, this bit overrides the DPLX bit in the PHY Register 0 (Control Register) and determine the

duplex mode. When this bit is set (1), the Internal PHY will operate at full duplex mode. When this bit is cleared (0), the

Internal PHY will operate at half Duplex mode. When the ANEG bit = 1, this bit is ignored and duplex mode is determined

by the outcome of the Auto-Negotiation or this bit is overridden by the DPLX bit in the PHY Register 0 (Control Register)

when the ANEG_EN bit in the PHY Register 0 (Control Register) is clear.

ANEG – Auto-Negotiation mode select - The PHY is placed in Auto-Negotiation mode when the ANEG bit and the

ANEG_EN bit in PHY Register 0 (Control Register) both are set. When either of these bits is cleared (0), the PHY is

placed in manual mode.

OFFSET

NAME

TYPE

SYMBOL

RECEIVE/PHY CONTROL

READ/WRITE

RPCR

HIGH

BYTE

Reserved

SPEED

DPLX

ANEG

Reserved

LOW

BYTE

LS2A

LS1A

LS0A

LS2B

LS1B

LS0B

Reserved

What do you want to

do?

Auto-Negotiation

Control Bits

Auto-Negotiation Advertisement Register

Duplex Mode

Control for

the MAC

Try to Auto-Negotiate

to ……

ANEG

Bit

ANEG_EN

Bit

TX_FDX

Bit

TX_HDX

Bit

10_FDX

Bit

10_HDX

Bit

SWFDUP

Bit

RPCR

(MAC)

(PHY)

Transmit

Control

(MAC)

100 Full Duplex

100 Half Duplex

10 Full Duplex

10 Half Duplex

LAN91C111 Datasheet(PDF) 46 Page - Microchip Technology

LAN91C111 Datasheet(HTML) 46 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL