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MB95F613K Datasheet(PDF) 38 Page - Cypress Semiconductor

Part # MB95F613K
Description  F2MC-8FX CPU core
PDF  110 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB95F613K Datasheet(HTML) 38 Page - Cypress Semiconductor

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Document Number: 002-04698 Rev. *A
Page 38 of 110
PRELIMINARY
MB95610H Series
■ Operation as a peripheral function input pin
❐ To set a pin as an input port, set the bit in the DDR0 register corresponding to the input pin of a peripheral function to “0”.
❐ When using the analog input shared pin as another peripheral function input pin, configure it as an input port, which is the same
as the operation as an input port.
❐ Reading the PDR0 register returns the pin value, regardless of whether the peripheral function uses that pin as its input pin.
However, if the read-modify-write (RMW) type of instruction is used to read the PDR0 register, the PDR0 register value is returned.
■ Operation as an LCDC segment output pin
❐ Set the bit in the DDR0 register corresponding to a desired LCDC segment output pin to “0”.
❐ Select the segment pin by setting a corresponding function select bit (SEG[35:32]) in the LCDCE7 register to “1”, and then set
the PICTL bit in the LCDCE1 register to “1”.
■ Operation at reset
If the CPU is reset, all bits in the DDR0 register are initialized to “0” and port input is enabled. As for a pin shared with analog input,
its port input is disabled because the AIDRL register is initialized to “0”.
■ Operation in stop mode and watch mode
❐ If the pin state setting bit in the standby control register (STBC:SPL) is set to “1” and the device transits to stop mode or watch
mode, the pin is compulsorily made to enter the high impedance state regardless of the DDR0 register value. The input of that
pin is locked to “L” level and blocked in order to prevent leaks due to input open. However, if the interrupt input is enabled for the
external interrupt (INT00 to INT03), the input is enabled and not blocked.
❐ If the pin state setting bit is “0”, the state of the port I/O or that of the peripheral function I/O remains unchanged and the output
level is maintained.
■ Operation as an analog input pin
❐ Set the bit in the DDR0 register bit corresponding to the analog input pin to “0” and the bit corresponding to that pin in the AIDRL
register to “0”.
❐ For a pin shared with other peripheral functions, disable the output of such peripheral functions.
■ Operation as an external interrupt input pin
❐ Set the bit in the DDR0 register corresponding to the external interrupt input pin to “0”.
❐ For a pin shared with other peripheral functions, disable the output of such peripheral functions.
❐ The pin value is always input to the external interrupt circuit. When using a pin for a function other than the interrupt, disable the
external interrupt function corresponding to that pin.



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