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MB95F613K Datasheet(PDF) 81 Page - Cypress Semiconductor

Part # MB95F613K
Description  F2MC-8FX CPU core
PDF  110 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB95F613K Datasheet(HTML) 81 Page - Cypress Semiconductor

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Document Number: 002-04698 Rev. *A
Page 81 of 110
PRELIMINARY
MB95610H Series
(Continued)
(VCC = 5.0 V10%, VSS = 0.0 V, TA = 40 C to 85 °C)
*1: • The power supply current is determined by the external clock. When the low-voltage detection reset circuit is selected, the power
supply current is the sum of adding the current consumption of the low-voltage detection reset circuit (ILVD) to one of the values
from ICC to ICCH. When both the low-voltage detection reset circuit and a CR oscillator are selected, the power supply current
is the sum of adding up the current consumption of the low-voltage detection reset circuit (ILVD), the current consumption of the
CR oscillator (ICRH or ICRL) and one of the values from ICC to ICCH. In on-chip debug mode, the main CR oscillator (ICRH) and
the low-voltage detection reset circuit are always in operation, and current consumption therefore increases accordingly.
• See “4. AC Characteristics (1) Clock Timing” for FCH, FCL, FCRH and FMCRPLL.
• See “4. AC Characteristics (2) Source Clock/Machine Clock” for FMP and FMPL.
• The power supply current value in standby mode is measured in deep standby mode. The current consumption in normal stand-
by is higher than that in deep standby mode. The power supply current value in normal standby can be found by adding the
current consumption difference between normal standby mode and deep standby mode (INSTBY) to the power supply current
value in deep standby mode. For details of normal standby and deep standby mode, refer to “CHAPTER 3 CLOCK CONTROL-
LER” in “New 8FX MB95610H Series Hardware Manual”.
*2: In sub-CR clock mode, the power supply current is the sum of adding ICCLS or ICCT to ICRH.
Parameter
Symbol
Pin name
Condition
Value
Unit
Remarks
Min
Typ
Max
LCD internal
division
resistance
RLCD
—
Between V4 and VSS
—20—
k
1/2 bias, 10 k
 resistor
—
200
—
k
1/2 bias, 100 k
resistor
—40—
k
1/4 bias, 10 k
 resistor
—
400
—
k
1/4 bias, 100 k
resistor
COM0 to COM7
output
impedance
RVCOM
COM0 to COM7
V1 to V4 = 4.1 V
——
5
k
SEG00 to
SEG51 output
impedance
RVSEG
SEG00 to SEG51
—
—
7
k
LCD leakage
current
ILCDL
V0 to V4, COM0 to
COM7, SEG00 to
SEG51
—
1—
1k



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