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MB95F613K Datasheet(PDF) 31 Page - Cypress Semiconductor |
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MB95F613K Datasheet(HTML) 31 Page - Cypress Semiconductor |
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31 / 110 page  Document Number: 002-04698 Rev. *A Page 31 of 110 PRELIMINARY MB95610H Series (Continued) Address Register abbreviation Register name R/W Initial value 0x0F94 T01DR 8/16-bit composite timer 01 data register R/W 0b00000000 0x0F95 T00DR 8/16-bit composite timer 00 data register R/W 0b00000000 0x0F96 TMCR0 8/16-bit composite timer 00/01 timer mode control register R/W 0b00000000 0x0F97 T11CR0 8/16-bit composite timer 11 status control register 0 R/W 0b00000000 0x0F98 T10CR0 8/16-bit composite timer 10 status control register 0 R/W 0b00000000 0x0F99 T11DR 8/16-bit composite timer 11 data register R/W 0b00000000 0x0F9A T10DR 8/16-bit composite timer 10 data register R/W 0b00000000 0x0F9B TMCR1 8/16-bit composite timer 10/11 timer mode control register R/W 0b00000000 0x0F9C PPS01 8/16-bit PPG01 cycle setting buffer register R/W 0b11111111 0x0F9D PPS00 8/16-bit PPG00 cycle setting buffer register R/W 0b11111111 0x0F9E PDS01 8/16-bit PPG01 duty setting buffer register R/W 0b11111111 0x0F9F PDS00 8/16-bit PPG00 duty setting buffer register R/W 0b11111111 0x0FA0 PPS11 8/16-bit PPG11 cycle setting buffer register R/W 0b11111111 0x0FA1 PPS10 8/16-bit PPG10 cycle setting buffer register R/W 0b11111111 0x0FA2 PDS11 8/16-bit PPG11 duty setting buffer register R/W 0b11111111 0x0FA3 PDS10 8/16-bit PPG10 duty setting buffer register R/W 0b11111111 0x0FA4 PPGS 8/16-bit PPG start register R/W 0b00000000 0x0FA5 REVC 8/16-bit PPG output inversion register R/W 0b00000000 0x0FA6 TMRH0 16-bit reload timer timer register (upper) ch. 0 R/W 0b00000000 TMRLRH0 16-bit reload timer reload register (upper) ch. 0 0x0FA7 TMRL0 16-bit reload timer timer register (lower) ch. 0 R/W 0b00000000 TMRLRL0 16-bit reload timer reload register (lower) ch. 0 0x0FA8 PSSR0 UART/SIO dedicated baud rate generator prescaler select register ch. 0 R/W 0b00000000 0x0FA9 BRSR0 UART/SIO dedicated baud rate generator baud rate setting register ch. 0 R/W 0b00000000 0x0FAA PSSR1 UART/SIO dedicated baud rate generator prescaler select register ch. 1 R/W 0b00000000 0x0FAB BRSR1 UART/SIO dedicated baud rate generator baud rate setting register ch. 1 R/W 0b00000000 0x0FAC to 0x0FAE — (Disabled) — — 0x0FAF AIDRL A/D input disable register (lower) R/W 0b00000000 0x0FB0 LCDCC1 LCDC control register 1 R/W 0b00000000 0x0FB1 — (Disabled) — — 0x0FB2 LCDCE1 LCDC enable register 1 R/W 0b00111110 0x0FB3 LCDCE2 LCDC enable register 2 R/W 0b00000000 0x0FB4 LCDCE3 LCDC enable register 3 R/W 0b00000000 0x0FB5 LCDCE4 LCDC enable register 4 R/W 0b00000000 0x0FB6 LCDCE5 LCDC enable register 5 R/W 0b00000000 |
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