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MB95F613K Datasheet(PDF) 84 Page - Cypress Semiconductor

Part # MB95F613K
Description  F2MC-8FX CPU core
PDF  110 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB95F613K Datasheet(HTML) 84 Page - Cypress Semiconductor

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Document Number: 002-04698 Rev. *A
Page 84 of 110
PRELIMINARY
MB95610H Series
(Continued)
(VCC = 2.4 V to 5.5 V, VSS = 0.0 V, TA = 40 °C to 85 °C)
*: The external clock signal is input to X0 and the inverted external clock signal to X1.
Parameter
Symbol
Pin name
Condition
Value
Unit
Remarks
Min
Typ
Max
Clock cycle time
tHCYL
X0, X1
—
61.5
—
1000
ns
When the main oscillation circuit
is used
X0
X1: open
83.4
—
1000
ns
When an external clock is used
X0, X1
*
30.8
—
1000
ns
tLCYL
X0A, X1A
—
—
30.5
—
µs
When the subclock is used
Input clock
pulse width
tWH1,
tWL1
X0
X1: open
33.4
—
—
ns
When an external clock is used,
the duty ratio should range
between 40% and 60%.
X0, X1
*
14.4
15.2
—
ns
tWH2,
tWL2
X0A
—
—
30.5
—
µs
Input clock
rising time and
falling time
tCR,
tCF
X0, X0A
X1: open
—
—
5
ns
When an external clock is used
X0, X1,
X0A, X1A
*—
—
5
ns
CR oscillation
start time
tCRHWK
—
—
—
—
50
µs
When the main CR clock is used
tCRLWK
—
—
—
—
30
µs
When the sub-CR clock is used
PLL oscillation
start time
tMCRPLLW
K
—
—
—
—
100
µs
When the main CR PLL clock is
used



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