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AD9542BCPZ Datasheet(PDF) 10 Page - Analog Devices

Part # AD9542BCPZ
Description  Quad Input, Five-Output, Dual DPLL Synchronizer and Adaptive Clock Translator
PDF  61 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9542BCPZ Datasheet(HTML) 10 Page - Analog Devices

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AD9542
Data Sheet
Rev. 0 | Page 10 of 61
TIME DURATION OF DIGITAL FUNCTIONS
Table 9.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
TIME DURATION OF DIGITAL
FUNCTIONS
EEPROM to Register Download
Time
10
ms
Using the Typical Configuration from Table 3
Power-On Reset (POR)
25
ms
Time from power supplies > 80% to release of internal reset
Mx Pin to RESETB Rising Edge
Setup Time
1
ns
Mx refers to Pin M0 through Pin M6
Mx Pin to RESETB Rising Edge
Hold Time
2
ns
Multiple Mx Pin Timing Skew
39
ns
Applies only to multibit Mx pin functions
RESETB Falling Edge to Mx Pin
High-Z Time
14
ns
TIME FROM START OF DPLL
ACTIVATION TO ACTIVE PHASE
DETECTOR OUTPUT
Untagged Operation
10
t
PFD
t
PFD is the nominal phase detector period given by R/fREF, where R is the
frequency division factor determined by the R divider, and f
REF is the
frequency of the active reference
Tagged Operation
10
Tag
period
Tag period = (tag ratio/f
TAG), where fTAG is either fREF (for tagged reference
mode) or f
FEEDBACK (for all other tagged modes); the tag ratio corresponds to
the selection of f
TAG
DIGITAL PLL (DPLL0, DPLL1) SPECIFICATIONS
Table 10.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DIGITAL PLL
Digital Phase Detector (DPD)
Input Frequency Range
1
2 × 105
Hz
Loop Filter
Profile 0
Bandwidth
0.0001
1850
Hz
Programmable design parameter; (f
PFD/bandwidth) ≥ 20
Phase Margin
70
Degrees
Closed-Loop Peaking
1.1
dB
Profile 1
Bandwidth
0.0001
305
Hz
Programmable design parameter; (f
PFD/bandwidth) ≥ 20
Phase Margin
88.5
Degrees
Closed-Loop Peaking
0.1
dB
In accordance with Telcordia GR-253-CORE jitter transfer
specifications
DIGITAL PLL NCO Division Ratio
These specifications cover limitations on the DPLLx frequency
tuning word (FTW0); the AD9542 evaluation software frequency
planning wizard sets these values automatically for the user, and
the AD9542 evaluation software is available for download from
the AD9542 product page at www.analog.com/AD9542; NCO
division = 248/FTW0, which takes the form INT.FRAC, where INT is
the integer portion, and FRAC is the fractional portion
NCO Integer
7
13
This is the integer portion of NCO division
NCO Fraction
0.05
0.95
This is the fractional portion of NCO division



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