AD9542BCPZ datasheet(19/61 Pages) AD

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Data Sheet

AD9542

Rev. 0 | Page 19 of 61

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

OUT0AN

SDO/M5

OUT1AP

SDIO/SDA

CSB/M6

OUT0AP

VDDIOA

SCLK/SCL

VDD

LF0

LDO0

AD9542

TOP VIEW

(Not to Scale)

VDD

OUT1AN

VDD

LDO1

VDD

LF1

VDDIOB

NOTES

1. EXPOSED PAD. THE EXPOSED PAD IS THE GROUND CONNECTION

ON THE CHIP. THE EXPOSED PAD MUST BE SOLDERED TO THE

ANALOG GROUND OF THE PCB TO ENSURE PROPER

FUNCTIONALITY AND FOR HEAT DISSIPATION, NOISE, AND

MECHANICAL STRENGTH BENEFITS.

2. DNC = DO NOT CONNECT. LEAVE THESE PINS FLOATING.

Figure 2. Pin Configuration

Table 25. Pin Function Descriptions

Pin No.

Mnemonic

Input/

Output

Pin Type

Description

SDO/M5

Output

CMOS

Serial Data Output (SDO). This pin is for reading serial data in 4-wire SPI mode.

Changes to the VDDIOA supply voltage affect the V

IH and VOH values for this pin.

Configurable Input/Output (M5).This pin is a status and control pin when the

device is not in 4-wire SPI mode.

SCLK/SCL

Input

CMOS

Serial Programming Clock (SCLK) Pin in SPI Mode. Changes to the VDDIOA supply

voltage affect the V

IH and VOH values for this pin.

Serial Clock Pin (SCL) in I2C Mode. Changes to the VDDIOA supply voltage affect the

IH and VOH values for this pin.

VDDIOA

Input

Power

Serial Port Power Supply. The valid supply voltage is 1.8 V, 2.5 V, or 3.3 V. The

VDDIOA pin can be connected to the VDD supply bus if 1.8 V operation is desired.

SDIO/SDA

Input/

output

CMOS

Serial Data Input/Output in SPI Mode (SDIO). Write data to this pin in 4-wire SPI

mode. This pin has no internal pull-up or pull-down resistor. Changes to the VDDIOA

supply voltage affect the V

IH and VOH values for this pin.

Serial Data Pin in I2C Mode (SDA).

CSB/M6

Input/

output

CMOS

Chip Select in SPI Mode (CSB). Active low input. Maintain a Logic 0 level on this pin

when programming the device in SPI mode. This pin has an internal 10 kΩ pull-up

resistor. Changes to the VDDIOA supply voltage affect the V

IH and VOH values for this pin.

Configurable Input/Output (M6). This pin is a status and control pin when the

device is not in SPI mode.

6, 9, 10, 13,

19, 20, 24,

27, 28, 31,

40, 41, 45

VDD

Input

Power

1.8 V Power Supply.

LDO0

Input

LDO bypass

APLL0 Loop Filter Voltage Regulator. Connect a 0.22 μF capacitor from this pin to

ground. This pin is the ac ground reference for the integrated APLL0 loop filter.

LF0

Input/

output

Loop filter

for APLL0

Loop Filter Node for APLL0. Connect a 3.9 nF capacitor from this pin to Pin 7

(LDO0).

OUT0AP

Output

HCSL, LVDS,

CML, CMOS

PLL0 Output 0A.

OUT0AN

Output

HCSL, LVDS,

CML, CMOS

PLL0 Complementary Output 0A.

AD9542BCPZ Datasheet(PDF) 19 Page - Analog Devices

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