82801E datasheet(42/84 Pages) INTEL

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Intel® 82801E C-ICH

Advance Information Datasheet

3.2.9

USB Interface

3.2.10

Power Signals

Table 15. USB Interface Signals

Name

Type

Description

USBP0P

USBP0N

USBP1P

USBP1N

I/O

Universal Serial Bus Port 1:0 Differential: These differential pairs are used to

transmit Data/Address/Command signals for ports 0 and 1.

OC[1:0]#

Overcurrent Indicators: These signals set corresponding bits in the USB

controllers to indicate that an overcurrent condition has occurred.

Table 16. Power Signals

Name

Type

Description

PWROK

Power OK: When asserted, PWROK is an indication to the 82801E C-ICH that

core power and PCICLK have been stable for at least 1 ms. PWROK can be driven

asynchronously. When PWROK is negated, the 82801E C-ICH asserts PCIRST#.

RSM_PWROK

Resume Well Power OK: When asserted, this signal is an indication to the

82801E C-ICH that the resume well power has been stable for at least 10 ms.

NOTE: The 82801E C-ICH does not use the resume well power OK signal.

RSMRST#

Resume Well Reset: RSMRST# is used for resetting the resume power plane

logic.

NOTE: The 82801E C-ICH does not use the resume well reset signal.

VRMPWRGD

VRM Power Good: VRMPWRGD should be connected to be the processor’s VRM

Power Good.

82801E Datasheet(PDF) 42 Page - Intel Corporation