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HD64F2145 Datasheet(PDF) 263 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 263 Page - Renesas Technology Corp |
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263 / 829 page ![]() Rev. 2.0, 08/02, page 223 of 788 • PWDPRB Bit Bit Name Initial Value R/W Description 7 6 5 4 3 2 1 0 OS15 OS14 OS13 OS12 OS11 OS10 OS9 OS8 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Output Select 15 to 8 These bits select the PWM output phase. Bits OS15 to OS8 correspond to outputs PW15 to PW8. 0: PWM direct output (PWDR value corresponds to high width of output) 1: PWM inverted output (PWDR value corresponds to low width of output) 9.3.4 PWM Output Enable Registers A and B (PWOERA, PWOERB) Each PWOER switches between PWM output and port output. • PWOERA Bit Bit Name Initial Value R/W Description 7 6 5 4 3 2 1 0 OE7 OE6 OE5 OE4 OE3 OE2 OE1 OE0 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W Output Enable 7 to 0 These bits, together with P1DDR, specify the P1n/PWn pin state. Bits OE7 to OE0 correspond to outputs PW7 to PW0. P1nDDR OEn: Pin state 0X: Port input 10: Port output or PWM 256/256 output 11: PWM output (0 to 255/256 output) Legend X: Don't care |
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