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TMS320F28375DPZP Datasheet(PDF) 40 Page - Texas Instruments

Part # TMS320F28375DPZP
Description  TMS320F2837xD Dual-Core Delfino??Microcontrollers
PDF  222 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320F28375DPZP Datasheet(HTML) 40 Page - Texas Instruments

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TMS320F28379D, TMS320F28378D, TMS320F28377D
TMS320F28376D, TMS320F28375D, TMS320F28374D
SPRS880K – DECEMBER 2013 – REVISED NOVEMBER 2018
www.ti.com
Submit Documentation Feedback
Product Folder Links: TMS320F28379D TMS320F28378D TMS320F28377D TMS320F28376D TMS320F28375D
TMS320F28374D
Terminal Configuration and Functions
Copyright © 2013–2018, Texas Instruments Incorporated
Table 4-1. Signal Descriptions (continued)
TERMINAL
I/O/Z(1)
DESCRIPTION
NAME
MUX
POSITION
ZWT
BALL
NO.
PTP
PIN
NO.
PZP
PIN
NO.
SPECIAL FUNCTIONS
ERRORSTS
U19
92
–
O
Error status output. This pin has an internal pulldown.
TEST PINS
FLT1
W12
73
42
I/O
Flash test pin 1. Reserved for TI. Must be left
unconnected.
FLT2
V13
74
43
I/O
Flash test pin 2. Reserved for TI. Must be left
unconnected.
(1)
Pins not bonded out in a given package will have the internal pullups enabled by the Boot ROM.
(1) I = Input, O = Output, OD = Open Drain, Z = High Impedance
(2) High-Speed SPI-enabled GPIO mux option. This pin mux option is required when using the SPI in High-Speed Mode (HS_MODE = 1 in
SPICCR). This mux option is still available when not using the SPI in High-Speed Mode (HS_MODE = 0 in SPICCR).
(3) This pin has output impedance that can be as low as 22 Ω. This output could have fast edges and ringing depending on the system
PCB characteristics. If this is a concern, the user should take precautions such as adding a 39Ω (10% tolerance) series termination
resistor or implement some other termination scheme. It is also recommended that a system-level signal integrity analysis be performed
with the provided IBIS models. The termination is not required if this pin is used for input function.
4.3
Pins With Internal Pullup and Pulldown
Some pins on the device have internal pullups or pulldowns. Table 4-2 lists the pull direction and when it
is active. The pullups on GPIO pins are disabled by default and can be enabled through software. In order
to avoid any floating unbonded inputs, the Boot ROM will enable internal pullups on GPIO pins that are
not bonded out in a particular package. Other pins noted in Table 4-2 with pullups and pulldowns are
always on and cannot be disabled.
Table 4-2. Pins With Internal Pullup and Pulldown
PIN
RESET
(XRS = 0)
DEVICE BOOT
APPLICATION SOFTWARE
GPIOx
Pullup disabled
Pullup disabled(1)
Pullup enable is application-
defined
TRST
Pulldown active
TCK
Pullup active
TMS
Pullup active
TDI
Pullup active
XRS
Pullup active
VREGENZ
Pulldown active
ERRORSTS
Pulldown active
Other pins
No pullup or pulldown present



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