TMS320F28375DPZP datasheet(6/222 Pages) TI1

6 / 222 page

TMS320F28379D, TMS320F28378D, TMS320F28377D

TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880K – DECEMBER 2013 – REVISED NOVEMBER 2018

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Product Folder Links: TMS320F28379D TMS320F28378D TMS320F28377D TMS320F28376D TMS320F28375D

TMS320F28374D

Revision History

Changes from May 8, 2018 to November 16, 2018 (from J Revision (May 2018) to K Revision)

Page

•

Global: Added TMS320F28378D.

.................................................................................................. 1

•

Global: Replaced controlSUITE with C2000Ware.

.............................................................................. 1

•

Section 1.3 (Description): Updated section.

...................................................................................... 2

•

Table 3-1 (Device Comparison): Added data for 28378D.

..................................................................... 7

•

Section 3.1 (Related Products): Updated section.

............................................................................... 9

•

Table 4-1 (Signal Descriptions): Updated DESCRIPTION of XRS.

.......................................................... 17

•

Table 4-7 (Connections for Unused Pins): Updated ACCEPTABLE PRACTICE column of GPIOx, VDDA, and

VSSA. .................................................................................................................................. 48

•

Section 5.9.1 (Power Sequencing): Updated section.

......................................................................... 59

•

Figure 5-5 (Power-on Reset): Updated "The XRS pin can be driven externally ..." footnote.

............................. 61

•

Table 5-12 (Internal Clock Frequencies): Removed "Lower LSPCLK will reduce device power consumption. The

default at reset is SYSCLK/4." footnote.

......................................................................................... 65

•

Figure 5-15 (External and ePIE Interrupt Sources): For CPU2, changed CPU1.NMIWD to CPU2.NMIWD.

.......... 76

•

Figure 5-50 (ePWM Trip Input Connectivity): Added PWMSYNC output.

................................................. 127

•

Figure 5-51 (Synchronization Chain Architecture): Updated figure.

........................................................ 128

•

Section 5.11.5.1 (SDFM Electrical Data and Timing (Using ASYNC)): Changed section title from "SDFM

Electrical Data and Timing" to "SDFM Electrical Data and Timing (Using ASYNC)". Updated section.

............... 137

•

Section 5.11.5.1: Added WARNING about glitches and ringing noise on SDFM clock inputs (SDx_Cy pins).

....... 137

•

Table 5-66 (SDFM Timing Requirements When Using Asynchronous GPIO (ASYNC) Option): Changed table

title from "SDFM Timing Requirements" to "SDFM Timing Requirements When Using Asynchronous GPIO

(ASYNC) Option".

................................................................................................................. 137

•

Section 5.11.5.2 (SDFM Electrical Data and Timing (Using 3-Sample GPIO Input Qualification)): Added section.

. 139

•

Section 5.12.1 (Controller Area Network (CAN)): Updated section.

....................................................... 140

•

Table 6-9 (Device Identification Registers): Added PARTIDH for TMS320F28378D.

.................................... 187

•

Section 6.11 (Dual Code Security Module): Added Code Security Module Disclaimer.

.................................. 199

•

Section 8.4 (Documentation Support): Updated section.

.................................................................... 207

•

Section 9.1 (Packaging Information): Removed paragraph about the MECHANICAL DATA figure showing a

generic thermal pad without dimensions.

....................................................................................... 209

TMS320F28375DPZP Datasheet(PDF) 6 Page - Texas Instruments

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