AX58200 datasheet(65/180 Pages) ASIX

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AX58200

EtherCAT Slave Controller SoC

PDMA Controller (PDMA)

2.7.1

Overview

The peripheral direct memory access (PDMA) controller is used to provide high-speed data transfer. The PDMA

controller can transfer data from one address to another without CPU intervention. This has the benefit of

reducing the workload of CPU and keeps CPU resources free for other applications. The PDMA controller has a

total of 16 channels and each channel can perform transfer between memory and peripherals or between memory

and memory.

2.7.2

Features

⚫

Supports 16 independently configurable channels

⚫

Selectable 2 level of priority (fixed priority or round-robin priority)

⚫

Supports transfer data width of 8, 16, and 32 bits

⚫

Supports source and destination address increment size can be byte, half-word, word or no

increment

⚫

Supports software and SPI, UART, DAC, ADC and PWM request

⚫

Supports Scatter-Gather mode to perform sophisticated transfer through the use of the descriptor

link list table

⚫

Supports single and burst transfer type

⚫

Supports time-out function on channel 0 and channel 1

⚫

Supports stride function from channel 0 to channel 5

Timer Controller (TMR)

2.8.1

Overview

The timer controller includes four 32-bit timers, Timer0 ~ Timer3, allowing user to easily implement a timer

control for applications. The timer can perform functions, such as frequency measurement, delay timing, clock

generation, and event counting by external input pins, and interval measurement by external capture pins.

The timer controller also provides four PWM generators. Each PWM generator supports two PWM output

channels in independent mode and complementary mode. The output state of PWM output pin can be controlled

by pin mask, polarity and break control, and dead-time generator.

2.8.2

Features

2.8.2.1 Timer Function Features

⚫

Four sets of 32-bit timers, each timer having one 24-bit up counter and one 8-bit prescale counter

⚫

Independent clock source for each timer

⚫

Provides one-shot, periodic, toggle-output and continuous counting operation modes

⚫

24-bit up counter value is readable through CNT (TIMERx_CNT[23:0])

⚫

Supports event counting function

⚫

24-bit capture value is readable through CAPDAT (TIMERx_CAP[23:0])

⚫

Supports external capture pin event for interval measurement

⚫

Supports external capture pin event to reset 24-bit up counter

⚫

Supports chip wake-up from Idle/Power-down mode if a timer interrupt signal is generated

AX58200 Datasheet(PDF) 65 Page - ASIX Electronics Corporation

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