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VSC7511 Datasheet(PDF) 104 Page - Microsemi Corporation |
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VSC7511 Datasheet(HTML) 104 Page - Microsemi Corporation |
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104 / 324 page ![]() Functional Descriptions VMDS-10488 VSC7511 Datasheet Revision 4.2 89 The two action vectors from the first and second lookups are combined into one action vector, which is applied in the analyzer. For more information, see Forwarding Engine, page 109. The actions are combined as follows: • HIT_ME_ONCE, CPU_COPY_ENA, CPU_QU_NUM: If any of the two action vectors have HIT_ME_ONCE or CPU_COPY_ENA set, CPU_COPY_ENA is POLICE_IDX 10 9 Selects VCAP policer used when policing frames (POLICE_ENA). POLICE_VCAP_ONLY 19 1 Disable policing from QoS, and port policers. Only the VCAP policer selected by POLICE_IDX is active. Only applies to the second lookup. PORT_MASK 20 11 Port mask applied to the forwarding decision based on MASK_MODE. REW_OP 31 9 Rewriter operation command. The following functions are supported: No operation: REW_OP[3:0] = 0. No operation. Special Rewrite: REW_OP[3:0]= 8. Swap the MAC addresses and clear bit 40 in the new SMAC when transmitting the frame. One-step PTP: REW_OP[2:0] = 2. The frame's residence time is added to the correction field in the PTP frame. The following sub-commands can be encoded: REW_OP[7]: Enables Add/subtract mode. REW_OP[5]: Set if egress delay must be added to correction field at egress. REW_OP[4:3]: Configures if ingress delay must be subtracted from the frame’s Rx time stamp. This is not applicable for ingress ports in backplane mode. Bits 4:3 = 0: No delay adjustments. Bits 4:3 = 1: Subtract delay ANA:PORT:PTP_DLY1_CFG. Bits 4:3 = 2: Subtract delay ANA:PORT:PTP_DLY2_CFG. Two-step PTP: REW_OP[2:0] = 3. The frame's departure time stamp is saved in the time stamp FIFO queue at egress. REW_OP[8:3] holds the PTP time stamp identifier used by the CPU. Origin PTP: REW_OP[2:0] = 9. The time of day at the frame's departure time is written into the origin time stamp field in the PTP frame. Unspecified bits must be set to 0. SMAC_REPLACE_ENA 40 1 If set, frame’s source MAC address is replaced with MAC address defined per egress port (SYS::REW_MAC_LOW_CFG, SYS::REW_MAC_HIGH_CFG) RESERVED 41 2 Reserved. Must be set to 0. ACL_ID 43 6 Logical ID for the entry. This ID is extracted together with the frame in the CPU extraction header. Only applicable to actions with CPU_COPY_ENA or HIT_ME_ONCE set. HIT_CNT 49 32 A statistics counter that is incremented by one each time the given action is hit. Table 59 • IS2 Action Fields (continued) Action Field Bit Width Description |
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