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DSPIC33EP128GS708 Datasheet(PDF) 369 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 369 Page - Microchip Technology |
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369 / 484 page  2016-2018 Microchip Technology Inc. DS70005258C-page 369 dsPIC33EPXXXGS70X/80X FAMILY 9 BSW BSW.C Ws,Wb Write C bit to Ws<Wb> 1 1 None BSW.Z Ws,Wb Write Z bit to Ws<Wb> 1 1 None 10 BTG BTG f,#bit4 Bit Toggle f 1 1 None BTG Ws,#bit4 Bit Toggle Ws 1 1 None 11 BTSC BTSC f,#bit4 Bit Test f, Skip if Clear 1 1 (2 or 3) None BTSC Ws,#bit4 Bit Test Ws, Skip if Clear 1 1 (2 or 3) None 12 BTSS BTSS f,#bit4 Bit Test f, Skip if Set 1 1 (2 or 3) None BTSS Ws,#bit4 Bit Test Ws, Skip if Set 1 1 (2 or 3) None 13 BTST BTST f,#bit4 Bit Test f 1 1 Z BTST.C Ws,#bit4 Bit Test Ws to C 1 1 C BTST.Z Ws,#bit4 Bit Test Ws to Z 1 1 Z BTST.C Ws,Wb Bit Test Ws<Wb> to C 1 1 C BTST.Z Ws,Wb Bit Test Ws<Wb> to Z 1 1 Z 14 BTSTS BTSTS f,#bit4 Bit Test then Set f 1 1 Z BTSTS.C Ws,#bit4 Bit Test Ws to C, then Set 1 1 C BTSTS.Z Ws,#bit4 Bit Test Ws to Z, then Set 1 1 Z 15 CALL CALL lit23 Call Subroutine 2 4 SFA CALL Wn Call Indirect Subroutine 1 4 SFA CALL.L Wn Call Indirect Subroutine (long address) 1 4 SFA 16 CLR CLR f f = 0x0000 1 1 None CLR WREG WREG = 0x0000 1 1 None CLR Ws Ws = 0x0000 1 1 None CLR Acc,Wx,Wxd,Wy,Wyd,AWB Clear Accumulator 1 1 OA,OB,SA,SB 17 CLRWDT CLRWDT Clear Watchdog Timer 1 1 WDTO,Sleep 18 COM COM f f = f 11 N,Z COM f,WREG WREG = f 11 N,Z COM Ws,Wd Wd = Ws 11 N,Z 19 CP CP f Compare f with WREG 1 1 C,DC,N,OV,Z CP Wb,#lit8 Compare Wb with lit8 1 1 C,DC,N,OV,Z CP Wb,Ws Compare Wb with Ws (Wb – Ws) 1 1 C,DC,N,OV,Z 20 CP0 CP0 f Compare f with 0x0000 1 1 C,DC,N,OV,Z CP0 Ws Compare Ws with 0x0000 1 1 C,DC,N,OV,Z 21 CPB CPB f Compare f with WREG, with Borrow 1 1 C,DC,N,OV,Z CPB Wb,#lit8 Compare Wb with lit8, with Borrow 1 1 C,DC,N,OV,Z CPB Wb,Ws Compare Wb with Ws, with Borrow (Wb – Ws – C) 1 1 C,DC,N,OV,Z 22 CPSEQ CPSEQ Wb,Wn Compare Wb with Wn, Skip if = 1 1 (2 or 3) None CPBEQ CPBEQ Wb,Wn,Expr Compare Wb with Wn, Branch if = 1 1 (5) None 23 CPSGT CPSGT Wb,Wn Compare Wb with Wn, Skip if > 1 1 (2 or 3) None CPBGT CPBGT Wb,Wn,Expr Compare Wb with Wn, Branch if > 1 1 (5) None 24 CPSLT CPSLT Wb,Wn Compare Wb with Wn, Skip if < 1 1 (2 or 3) None CPBLT CPBLT Wb,Wn,Expr Compare Wb with Wn, Branch if < 1 1 (5) None 25 CPSNE CPSNE Wb,Wn Compare Wb with Wn, Skip if 11 (2 or 3) None CPBNE CPBNE Wb,Wn,Expr Compare Wb with Wn, Branch if 11 (5) None TABLE 28-2: INSTRUCTION SET OVERVIEW (CONTINUED) Base Instr # Assembly Mnemonic Assembly Syntax Description # of Words # of Cycles(1) Status Flags Affected Note 1: Read and Read-Modify-Write (e.g., bit operations and logical operations) on non-CPU SFRs incur an additional instruction cycle. |
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