| Electronic Components Datasheet Search |
|
DSPIC33EP128GS708 Datasheet(PDF) 373 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
DSPIC33EP128GS708 Datasheet(HTML) 373 Page - Microchip Technology |
|
373 / 484 page ![]() 2016-2018 Microchip Technology Inc. DS70005258C-page 373 dsPIC33EPXXXGS70X/80X FAMILY 74 SL SL f f = Left Shift f 1 1 C,N,OV,Z SL f,WREG WREG = Left Shift f 1 1 C,N,OV,Z SL Ws,Wd Wd = Left Shift Ws 1 1 C,N,OV,Z SL Wb,Wns,Wnd Wnd = Left Shift Wb by Wns 1 1 N,Z SL Wb,#lit5,Wnd Wnd = Left Shift Wb by lit5 1 1 N,Z 75 SUB SUB Acc Subtract Accumulators 1 1 OA,OB,OAB, SA,SB,SAB SUB f f = f – WREG 1 1 C,DC,N,OV,Z SUB f,WREG WREG = f – WREG 1 1 C,DC,N,OV,Z SUB #lit10,Wn Wn = Wn – lit10 1 1 C,DC,N,OV,Z SUB Wb,Ws,Wd Wd = Wb – Ws 1 1 C,DC,N,OV,Z SUB Wb,#lit5,Wd Wd = Wb – lit5 1 1 C,DC,N,OV,Z 76 SUBB SUBB f f = f – WREG – (C) 1 1 C,DC,N,OV,Z SUBB f,WREG WREG = f – WREG – (C) 1 1 C,DC,N,OV,Z SUBB #lit10,Wn Wn = Wn – lit10 – (C) 1 1 C,DC,N,OV,Z SUBB Wb,Ws,Wd Wd = Wb – Ws – (C) 1 1 C,DC,N,OV,Z SUBB Wb,#lit5,Wd Wd = Wb – lit5 – (C) 1 1 C,DC,N,OV,Z 77 SUBR SUBR f f = WREG – f 1 1 C,DC,N,OV,Z SUBR f,WREG WREG = WREG – f 1 1 C,DC,N,OV,Z SUBR Wb,Ws,Wd Wd = Ws – Wb 1 1 C,DC,N,OV,Z SUBR Wb,#lit5,Wd Wd = lit5 – Wb 1 1 C,DC,N,OV,Z 78 SUBBR SUBBR f f = WREG – f – (C) 1 1 C,DC,N,OV,Z SUBBR f,WREG WREG = WREG – f – (C) 1 1 C,DC,N,OV,Z SUBBR Wb,Ws,Wd Wd = Ws – Wb – (C) 1 1 C,DC,N,OV,Z SUBBR Wb,#lit5,Wd Wd = lit5 – Wb – (C) 1 1 C,DC,N,OV,Z 79 SWAP SWAP.b Wn Wn = Nibble Swap Wn 1 1 None SWAP Wn Wn = Byte Swap Wn 1 1 None 80 TBLRDH TBLRDH Ws,Wd Read Prog<23:16> to Wd<7:0> 1 5 None 81 TBLRDL TBLRDL Ws,Wd Read Prog<15:0> to Wd 1 5 None 82 TBLWTH TBLWTH Ws,Wd Write Ws<7:0> to Prog<23:16> 1 2 None 83 TBLWTL TBLWTL Ws,Wd Write Ws to Prog<15:0> 1 2 None 84 ULNK ULNK Unlink Frame Pointer 1 1 SFA 85 XOR XOR f f = f .XOR. WREG 1 1 N,Z XOR f,WREG WREG = f .XOR. WREG 1 1 N,Z XOR #lit10,Wn Wd = lit10 .XOR. Wd 1 1 N,Z XOR Wb,Ws,Wd Wd = Wb .XOR. Ws 1 1 N,Z XOR Wb,#lit5,Wd Wd = Wb .XOR. lit5 1 1 N,Z 86 ZE ZE Ws,Wnd Wnd = Zero-Extend Ws 1 1 C,Z,N TABLE 28-2: INSTRUCTION SET OVERVIEW (CONTINUED) Base Instr # Assembly Mnemonic Assembly Syntax Description # of Words # of Cycles(1) Status Flags Affected Note 1: Read and Read-Modify-Write (e.g., bit operations and logical operations) on non-CPU SFRs incur an additional instruction cycle. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |