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Z8F082ASH020SC Datasheet(PDF) 113 Page - Zilog, Inc. |
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Z8F082ASH020SC Datasheet(HTML) 113 Page - Zilog, Inc. |
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113 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y UART Z8 Encore! XP® F08xA Seriess Product Specification 95 (BRG[15:0]) that sets the data transmission rate (baud rate) of the UART. The UART data rate is calculated using the following equation: When the UART is disabled, the Baud Rate Generator functions as a basic 16-bit timer with interrupt on time-out. To configure the Baud Rate Generator as a timer with interrupt on time-out, complete the following procedure: 1. Disable the UART by clearing the REN and TEN bits in the UART Control 0 register to 0. 2. Load the acceptable 16-bit count value into the UART Baud Rate High and Low Byte registers. 3. Enable the Baud Rate Generator timer function and associated interrupt by setting the BIRQ bit in the UART Control 1 register to 1. When configured as a general purpose timer, the interrupt interval is calculated using the following equation: Interrupt Interval (s) = System Clock Period (s) ×BRG[15:0] ] UART Control Register Definitions The UART control registers support the UART and the associated Infrared Encoder/ Decoders. For more information about the infrared operation, refer to the Infrared Encoder/Decoder chapter on page 104. UART Transmit Data Register Data bytes written to the UART Transmit Data register (Table 60) are shifted out on the TXDx pin. The Write-only UART Transmit Data register shares a Register File address with the read-only UART Receive Data register. Table 60. UART Transmit Data Register (U0TXD) BITS 7 6 5 4 3 2 1 0 FIELD TXD RESET XX XX XXX X R/W WW WW WWW W ADDR F40H UART Data Rate (bits/s) System Clock Frequency (Hz) 16 UART Baud Rate Divisor Value × ---------------------------------------------------------------------------------------------- = |
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