48SWTQFN-EP datasheet(62/103 Pages) MAXIM

62 / 103 page

MAX9288/MAX9290

3.12Gbps GMSL Deserializers

for Coax or STP Input and MIPI CSI-2 Output

www.maximintegrated.com

Maxim Integrated │ 62

I2C Interface

In I2C-to-I2C mode, the deserializer’s control-channel

interface sends and receives data through an I2C-

compatible 2-wire interface. The interface uses a serial-

data line (SDA) and a serial-clock line (SCL) to achieve

bidirectional communication between master and slave(s).

A µC master initiates all data transfers to and from the

device and generates the SCL clock that synchronizes

the data transfer. When an I2C transaction starts on the

local-side device’s control-channel port, the remote-side

device’s control-channel port becomes an I2C master

that interfaces with remote-side I2C peripherals. The I2C

master must accept clock stretching that is imposed by

the deserializer (holding SCL low). The SDA and SCL

lines operate as both an input and an open-drain output.

Pullup resistors are required on SDA and SCL. Each

transmission consists of a START condition (Figure 6)

sent by a master, followed by the device’s 7-bit slave

address plus a R/W bit, a register address byte, one or

more data bytes, and finally a STOP condition.

Figure 46. Format Conversion Between GMSL UART and I2C without Register Address (I2CMETHOD = 1)

: MASTER TO SLAVE

SERIALIZER/DESERIALIZER

UART-TO-I2C CONVERSION OF READ PACKET (I2CMETHOD = 1)

UART-TO-I2C CONVERSION OF WRITE PACKET (I2CMETHOD = 1)

µC

SERIALIZER/DESERIALIZER

µC

SYNC FRAME

DEVICE ID + RD

SYNC FRAME

DEVICE ID + WR

DATA 0

DATA N

ACK FRAME

DATA 0

DATA N

DATA 0

W A

DEV ID

A P

PERIPHERAL

1 1

DEV ID R A

A P

DATA 0

DATA N

: SLAVE TO MASTER S: START

P: STOP

A: ACKNOWLEDGE

48SWTQFN-EP Datasheet(PDF) 62 Page - Maxim Integrated Products

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