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48SWTQFN-EP Datasheet(PDF) 30 Page - Maxim Integrated Products |
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48SWTQFN-EP Datasheet(HTML) 30 Page - Maxim Integrated Products |
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30 / 103 page ![]() MAX9288/MAX9290 3.12Gbps GMSL Deserializers for Coax or STP Input and MIPI CSI-2 Output www.maximintegrated.com Maxim Integrated │ 30 Figure 16. High-Bandwidth Mode Serial-Data Format Figure 17. Transmitting a Frame from GMSL to MIPI D0 SERIAL DATA D1 27 BITS INPUT PIN DOUT 0 DOUT 1 D17 D18 D19 D20 D21 D22 D23 ACB FCC PCB DOUT 17 DOUT 21 DOUT 22 DOUT 23 DOUT 24 DOUT 25 DOUT 26 WS SCK SD RX/ SDA TX/ SCL INPUT SIGNAL R0 R1 B5 R6 R7 G6 G7 B6 B7 HS VS DE RGB DATA RGB DATA I2S/TDM AUDIO UART/I2C VS/HS MUST BE SET AT DOUT[20:18]. MAX9290 NOTE: ONLY DOUT[17:0], DOUT[26:21] AND ACB HAVE HDCP ENCRYPTION. AUDIO DECODE FORWARD CONTROL- CHANNEL BIT PACKET PARITY CHECK BIT SPECIAL SERIAL-DATA PACKET CNTL0/ ADD0 DOUT27/ CNTL1 DOUT28/ CNTL2 CNTL3 ADD1 DOUT 18/HS DOUT 19/VS DOUT 20/DE AUX CONTROL BITS CONTROL BITS CONTROL-SIGNAL DECODING 27 BITS VS DE* DOUT CSI-2 DOUT_± HS* KEY: SOT: START OF TRANSMISSION EOT: END OF TRANSMISSION PH: PACKET HEADER PF: PACKET FOOTER FS: FRAME START FE: FRAME END LPS: LOW POWER STATE SOT FS EOT LPS LPS SOT FE EOT LPS LPS LPKT SPKT LPKT SPKT SOT PH EOT LPS LPS DATA PF *REGISTER SETTING DETERMINES WHETHER DE OR HS IS USED FOR PACKET TIMING ≥ 200PCLK ≥ 200PCLK ≥ 200PCLK ≥ 200PCLK ≥ 200PCLK |
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