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48SWTQFN-EP Datasheet(PDF) 27 Page - Maxim Integrated Products |
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48SWTQFN-EP Datasheet(HTML) 27 Page - Maxim Integrated Products |
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27 / 103 page ![]() MAX9288/MAX9290 3.12Gbps GMSL Deserializers for Coax or STP Input and MIPI CSI-2 Output www.maximintegrated.com Maxim Integrated │ 27 Detailed Description The MAX9288/MAX9290 deserializers, when paired with the MAX9275/MAX9277/MAX9279/MAX9281 serializ- ers, provide the full set of operating features, but are backward-compatible with the MAX9249–MAX9270 fam- ily of gigabit multimedia serial link (GMSL) devices, and have basic functionality when paired with any GMSL device. The MAX9290 has high-bandwidth digital content protection (HDCP), while the MAX9288 does not. Each deserializer has a maximum serial-bit rate of 3.12Gbps for up to 15m of cable and operates up to a maximum output clock of 104MHz in 24-bit mode and 27-bit high-bandwidth mode, or 78MHz in 32-bit mode. This bit rate and output flexibility support a wide range of displays, from QVGA (320 x 240) to 1920 x 720 and higher with 24-bit color, as well as megapixel image sen- sors. An encoded audio channel supports L-PCM I2S stereo and up to eight channels of L-PCM in TDM mode. Sample rates of 32kHz to 192kHz are supported with sample depth from 8 to 32 bits. Input equalization, com- bined with GMSL serializer pre/deemphasis, extends the cable length and enhances link reliability. The control channel enables a µC to program the serial- izer and deserializer registers and program registers on peripherals. The control channel is also used to perform HDCP functions (MAX9290 only). The µC can be located at either end of the link, or when using two µCs, at both ends. Two modes of control-channel operation are avail- able. Base mode uses either I2C or GMSL UART protocol, while bypass mode uses a user-defined UART protocol. UART protocol allows full-duplex communication, while I2C allows half-duplex communication. The serial input complies with ISO 10605 and IEC 61000- 4-2 ESD protection standards. Register Mapping Registers set the operating conditions of the deserial- izers and are programmed using the control channel in base mode. The MAX9288/MAX9290 holds its own device address and the device address of the serial- izer it is paired with. Similarly, the serializer holds its own device address and the address of the MAX9288/ MAX9290. Whenever a device address is changed, be sure to write the new address to both devices. The default device address of the deserializer is set by the ADD_ and CX/TP inputs (Table 1). Registers 0x00 and 0x01 in both devices hold the device addresses. Figure 13. MIPI Output Timing Parameters CLK+/- DOUT_+/- VIL(max) VIH(min) VIDTH(max) CAPTURE 1ST DATA BIT tLPTX tHS-PREPARE tHS-ZERO tHS-SYNC LP-11 LP-01 LP-00 tD-TERM-EN tHS-SETTLE LP-11 tHS-SKIP tREOT tEOT tHS-TRAIL tHS-EXIT DISCONNECT TERMINATOR VTERM-EN(max) CLK+/- VIL(max) VIDTH(max) tLPTX tCLK-PREPARE tCLK-ZERO LP-11 LP-01 LP-00 TD-TERM-EN tHS-SETTLE VTERM-EN(max) NOTE: THE CSI CLOCK RUNS IN CONTINUOUS MODE ONLY. |
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