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48SWTQFN-EP Datasheet(PDF) 84 Page - Maxim Integrated Products

Part # 48SWTQFN-EP
Description  3.12Gbps GMSL Deserializers for Coax or STP Input and MIPI CSI-2 Output
PDF  103 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

48SWTQFN-EP Datasheet(HTML) 84 Page - Maxim Integrated Products

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MAX9288/MAX9290
3.12Gbps GMSL Deserializers
for Coax or STP Input and MIPI CSI-2 Output
www.maximintegrated.com
Maxim Integrated │ 84
Three-Level Configuration Inputs
CX/TP and BWS are three-level inputs that control the seri-
al interface configuration and power-up defaults. Connect
three-level inputs through a pullup resistor to IOVDD to set
a high level, a pulldown resistor to GND to set a low level,
or open to set a mid level. For digital control, use three-
state logic to drive the three-level logic input.
Configuration Blocking
The deserializers can block changes to registers. Set
CFGBLOCK to make registers 0x00 to 0x1F as read only.
Once set, the registers remain blocked until the supplies
are removed or until PWDN is low.
Compatibility with Other GMSL Devices
The deserializers are designed to pair with the MAX9275–
MAX9281 serializers, but interoperate with any GMSL
serializers. See Table 21 for operating limitations
Key Memory
Each device has a unique HDCP key set that is stored
in secure nonvolatile memory (NVM). The HDCP key set
consists of 40 56-bit private keys and one 40-bit public
key. The NVM is qualified for automotive applications.
HS/VS/DE Inversion
The deserializers use an active-high HS, VS, and DE
for encoding and HDCP encryption. Set INVHSYNC,
INVVSYNC, and INVDE in the serializer to invert active-
low input signals for use with the GMSL devices. Set
INVHSYNC, INVVSYNC, and INVDE in the deserializer
(register 0x14) to output active-low signals for use with
downstream devices.
WS/SCK Inversion
The deserializers use standard polarities for I2S. Set
INVWS and INVSCK in the serializer (register 0x1B) to
invert opposite polarity signals for use with the GMSL
devices. Set INVWS and INVSCK in the deserializer
(register 0x1D) to output reverse-polarity signals for
downstream use.
GPIOs
The deserializers have two open-drain GPIOs available
when not used for HDCP purposes (see the Notification
of Start of Authentication and Enable of Encryption to
Downstream Links section), GPIO1OUT and GPIO0OUT
(0x06, D3 and D1) set the output state of the GPIOs.
Setting the GPIO output bits to 0 low pulls the output low,
while setting the bits to 1 leaves the output undriven, and
pulled high through internal/external pullup resistors. The
GPIO input buffers are always enabled. The input states
are stored in GPIO1 and GPIO0 (0x06, D2 and D0). Set
GPIO1OUT/GPIO0OUT to 1 when using GPIO1/GPIO0
as an input.
Line-Fault Detection
The line-fault detector monitors for line failures such
as short to ground, short to battery, and open link for
system-fault diagnosis. Figure 1 shows the required
external resistor connections. LFLT = low when a line fault
is detected and LFLT goes high when the line returns to
normal. The line-fault type is stored in 0x08 D[3:0] of the
serializer. Filter LFLT with the µC to reduce the detector’s
susceptibility to short ground shifts. The fault-detector
threshold voltages are referenced to the serializer ground.
Additional passive components set the DC level of the
cable. If the serializer and GMSL deserializer grounds are
different, the link DC voltage during normal operation can
vary and cross one of the fault-detection thresholds.
Table 21. MAX9288/MAX9290 Feature Compatibility
FEATURE
GMSL SERIALIZER
HDCP (MAX9290 only)
If feature not supported in serializer, must not be turned on in the MAX9290.
High-bandwidth mode
If feature not supported in serializer, must only use 24-bit and 32-bit modes.
I2C-to-I2C
If feature not supported in serializer, must use UART-to-I2C or UART-to-UART.
Coax
If feature not supported in serializer, must connect unused serial output through 200nF and
50Ω in series to VDD and set the reverse control channel amplitude to 100mV.
High-immunity control channel
If feature not supported in serializer, must use the legacy reverse control-channel mode.
TDM encoding
If feature not supported in serializer, must use I2S encoding (with 50% WS duty cycle), if
supported.
I2S encoding
If feature not supported in serializer, must disable I2S in the MAX9288/MAX9290.



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