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48SWTQFN-EP Datasheet(PDF) 7 Page - Maxim Integrated Products |
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48SWTQFN-EP Datasheet(HTML) 7 Page - Maxim Integrated Products |
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7 / 103 page ![]() MAX9288/MAX9290 3.12Gbps GMSL Deserializers for Coax or STP Input and MIPI CSI-2 Output www.maximintegrated.com Maxim Integrated │ 7 LIST OF TABLES Table 1. Device Address Defaults (Register 0x00, 0x01) .............................................. 28 Table 2 Video Output Map (RGB and YUV) ........................................................ 48 Table 3. Video Output Map (RAW and User Defined) ................................................ 49 Table 4. Control Output Map ............................................................... ..... 51 Table 5. GMSL Data-Rate Selection Table ......................................................... 51 Table 6. Input Pixel Clock Range (MHz) ........................................................... 51 Table 7. Output CSI-2 Data Rate Range (Mbps) ..................................................... 54 Table 8. Maximum Audio WS Frequency (kHz) for Various Pixel Clock Frequencies......................... 56 Table 9. fSRC Settings ............................................................... ......... 59 Table 10. I2C Bit-Rate Ranges............................................................... .... 66 Table 11. Cable Equalizer Boost Levels............................................................ 67 Table 12. Configuration Input Map............................................................... . 69 Table 13. Pixel Data Format............................................................... ...... 69 Table 14. Reverse Control-Channel Modes......................................................... 71 Table 15. Fast High-Immunity Mode Requirements................................................... 71 Table 16. Startup Procedure for Image-Sensing Applications (CDS = High, Figure 58) ...................... 72 Table 17. Startup, HDCP Authentication, and Normal Operation (Deserializer is Not a Repeater)—First Part of the HDCP Authentication Protocol ........................................................74 Table 18. Link Integrity Check (Normal)—Performed Every 128 Frames After Encryption is Enabled ........... 76 Table 19. Optional Enhanced Link Integrity Check—Performed Every 16 Frames After Encryption is Enabled .... 77 Table 20. HDCP Authentication and Normal Operation (One Repeater, Two µCs)—First and Second Parts of the HDCP Authentication Protocol ...................................................... 79 Table 21. MAX9288/MAX9290 Feature Compatibility ................................................. 84 Table 22. Line-Fault Mapping ............................................................... .... 86 Table 23. Additional Supply Current from HDCP (MAX9290 Only)....................................... 86 Table 24. Suggested Connectors and Cables for GMSL............................................... 86 Table 25. Register Table ............................................................... ........ 88 Table 26. HDCP Register Table (MAX9290 Only)................................................... 100 Table 26. HDCP Register Table (MAX9290 Only)................................................... 101 |
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