STAC9752 datasheet(40/95 Pages) IDT

40 / 95 page

STAC9752/9753

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING

IDT™

STAC9752/9753

REV 3.3 1206

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING

5.5.

AC-Link Interoperability Requirements and Recommendations

5.5.1.

“Atomic slot” Treatment of Slot 1 Address and Slot 2 Data

Command or Status Address and Data cannot be split across multiple AC-Link frames. The following

transactions require that valid Slot 1 Address and valid Slot 2 Data be treated as “atomic” (insepara-

ble) with Slot 0 Tag bits for Address and Data set accordingly (that is, both valid):

AC‘97 Digital Controller write commands to Primary CODECs

AC‘97 CODEC status responses

Whenever the AC‘97 Digital Controller addresses a Primary CODEC or an AC‘97 CODEC responds

to a read command, Slot 0 Tag bits should always be set to indicate actual Slot 1 and Slot 2 data

validity.

When the AC‘97 Digital Controller addresses a Secondary CODEC, the Slot 0 Tag bits for Address

and Data must be 0. A non-zero, 2-bit CODEC ID in the LSBs of Slot 0 indicates a valid Read or

Write Address in Slot 1, and the Slot 1 R/W bit indicates presence or absence of valid Data in Slot 2.

Table 11. Primary CODEC Addressing: Slot 0 Tag Bits

Function

Slot 0, bit 15

(Valid

Frame)

Slot 0, bit 14

(Valid Slot 1

Address)

Slot 0, bit 13

(Valid Slot 2 Data)

Slot 0, Bits 1-0

(CODEC ID)

AC‘97 Digital Controller Primary

Read Frame N, SDATA_OUT

AC‘97 Digital Controller Primary

Write Frame N, SDATA_OUT

AC‘97 CODEC Status Frame

N+1, SDATA_IN

Table 12. Secondary CODEC Addressing: Slot 0 Tag Bits

Function

Slot 0, bit 15

(Valid

Frame)

Slot 0, bit 14

(Valid Slot 1

Address)

Slot 0, bit 13

(Valid Slot 2

Data)

Slot 0, Bits

1-0

(CODEC ID)

AC‘97 Digital Controller

Secondary Read Frame N,

SDATA_OUT

01, 10, or 11

AC‘97 Digital Controller

Secondary Write Frame N,

SDATA_OUT

01, 10, or 11

AC‘97 CODEC Status Frame N+1,

SDATA_IN

STAC9752 Datasheet(PDF) 40 Page - Integrated Device Technology

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