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STAC9752 Datasheet(PDF) 82 Page - Integrated Device Technology

Part # STAC9752
Description  TWO-CHANNEL, 20-BIT, AC??7 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
PDF  95 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

STAC9752 Datasheet(HTML) 82 Page - Integrated Device Technology

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STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
IDT™
82
STAC9752/9753
REV 3.3 1206
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
10. MULTIPLE CODEC SUPPORT
The STAC9752/9753 provides support for the multi-CODEC option according to the Intel AC'97, rev
2.3 specification. By definition, there can be only one Primary CODEC (CODEC ID 00) and up to
three Secondary CODECs (CODEC IDs 01,10, and 11). The CODEC ID functions as a chip select.
Secondary devices therefore have completely orthogonal register sets; each is individually accessi-
ble and they do not share registers.
10.1. Primary/Secondary CODEC Selection
In a multi-CODEC environment the CODEC ID is provided by external programming of pins 45 and
46 (CID0 and CID1). The CID pin electrical function is logically inverted from the CODEC ID desig-
nation. The corresponding pin state and its associated CODEC ID are listed in the “CODEC ID
Selection” table.
10.1.1.
Primary CODEC Operation
As a Primary device, the STAC9752/9753 is completely compatible with existing AC'97 definitions
and extensions. Primary CODEC registers are accessed exactly as defined in the AC'97 Component
Specification and AC'97 Extensions. The STAC9752/9753 operates as Primary by default, and the
external ID pins (45 and 46), have internal pull-ups so that these pins may be left as no-connects for
operation as a primary.
When used as the Primary CODEC, the STAC9752/9753 generates the master AC-Link BIT_CLK
for both the AC'97 Digital Controller and any Secondary CODECs. The STAC9752/9753 can support
up to four loads of 10 K
Ω and 50 pF on the BIT_CLK output. This is to ensure that up to four CODEC
implementations will not load down the clock output.
10.1.2.
Secondary CODEC Operation
When the STAC9752/9753 is configured as a Secondary device the BIT_CLK pin is configured as an
input at power up. Using the BIT_CLK provided by the Primary CODEC insures that everything on
the AC-Link will be synchronous. As a Secondary device it can be defined as CODEC ID 01, 10, or
11 in the two-bit field(s) of the Extended Audio and/or Extended Modem ID Register(s).
Table 28. CODEC ID Selection
CID1 State
CID0 State
CODEC ID
CODEC Status
Dvdd or floating
Dvdd or floating
00
Primary
Dvdd or floating
0 V
01
Secondary
0 V
Dvdd or floating
10
Secondary
0 V
0 V
11
Secondary



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