PM7347 datasheet(35/341 Pages) PMC

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S/UNI®-JET Data Sheet

Released

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

Document ID: PMC-1990267, Issue 3

Pin Name

Type

No.

Function

By default, both TNEG and TOHM are updated on the

falling edge of TCLK and can be enabled for update on

the rising edge of TCLK. This sampling is controlled by

the TCLKINV bit in the S/UNI-JET Transmit

Configuration Register. Also, both TNEG and TOHM can

be updated on the rising edge of TICLK, enabled by the

TICLK bit in the S/UNI-JET Transmit Configuration

TCLK

Output

The Transmit Output Clock (TCLK) provides the transmit

direction timing. TCLK is a buffered version of TICLK and

can be enabled to update the TPOS/TDATO and

TNEG/TOHM outputs on its rising or falling edge.

RPOS

RDATI

Input

The Receive Digital Positive Pulse (RPOS) contains the

positive pulses received on the B3ZS-encoded DS3, the

HDB3-encoded E3, or the B8ZS-encoded J2

transmission system when the dual-rail NRZ input format

is selected.

The Receive Data (RDATI) contains the data stream

when the single-rail (unipolar) NRZ input format is

enabled or when a non-DS3/E3/J2 based transmission

system is being processed (for example, RDATI may

contain a DS1 or E1 stream).

The RPOS/RDATI pin function selection is controlled by

the RFRM[1:0] bits in the S/UNI-JET Configuration

FRMR, or the J2 FRMR Configuration Register.

Both RPOS and RDATI are sampled on the rising edge

of RCLK by default, and may be enabled to be sampled

on the falling edge of RCLK. This sampling is controlled

by the RCLKINV bit in the S/UNI-JET Receive

Configuration Register.

Note: Signal polarity control is provided by the RPOSINV

bit in the S/UNI-JET Receive Configuration Register.

PM7347 Datasheet(PDF) 35 Page - PMC-Sierra, Inc

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