REF5045 datasheet(32/62 Pages) TI2

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œœ

BUSY

D17

DOUT-1

& DIN-2

SCLK

CONVST

1/fsample

tACQ

tconv-max

Acquiring

6DPSOH µQ¶

Converting

6DPSOH µQ¶

End-of-

Conversion

ADC

STATE

tconv-min

œœ

$FTXLULQJ 6DPSOH µQ+1¶

DOUT-2

œœ

D17

œœ

BUSY

D17

œœ

D16

DIN-1 =

CONVST

th-DI-CNV

ADC 2

GDWD IRU VDPSOH µQ¶

ADC 1

GDWD IRU VDPSOH µQ¶

ADC 1 data

ADC 2 data

ADC 1 data

CONVST

DOUT-

SCLK

DIN-

SDI

CLK

CNV

ADC 1

Digital Host

IRQ

CONVST

DOUT-

SCLK

DIN-

ADC 2

CONVST

DOUT-

SCLK

DIN-

ADC N

CONVST

DOUT-

N-1

SCLK

DIN-

N-1

ADC N 1

}

ADS8881

SBAS547D – MAY 2013 – REVISED AUGUST 2015

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Product Folder Links: ADS8881

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Device Functional Modes (continued)

10.4.2.2 Daisy-Chain Mode With a Busy Indicator

This interface option is most useful in applications where multiple ADC devices are used but the digital host has

limited interfacing capability and an interrupt-driven data transfer is desired. Figure 62 shows a connection

diagram with N ADCs connected in the daisy-chain. The CONVST pins of all ADCs in the chain are connected

together and are controlled by a single pin of the digital host. Similarly, the SCLK pins of all ADCs in the chain

are connected together and are controlled by a single pin of the digital host. The DIN pin for ADC 1 (DIN-1) is

connected to its CONVST. The DOUT pin of ADC 1 (DOUT-1) is connected to the DIN pin of ADC 2 (DIN-2), and

so on. The DOUT pin of the last ADC in the chain (DOUT-N) is connected to the SDI and IRQ pins of the digital

host.

Figure 62. Connection Diagram: Daisy-Chain Mode With a Busy Indicator (DIN = 0)

As shown in Figure 63, the device DOUT pin is driven low when DIN and CONVST are low together. A CONVST

rising edge selects daisy-chain mode, samples the analog input, and causes the device to enter a conversion

phase. In this interface option, CONVST must remain high from the start of the conversion until all data bits are

read. When started, the conversion continues regardless of the state of SCLK, however SCLK must be high at

the CONVST rising edge so that the device generates a busy indicator at the end of the conversion.

Figure 63. Interface Timing Diagram: For Two Devices in Daisy-Chain Mode With a Busy Indicator

REF5045 Datasheet(PDF) 32 Page - Texas Instruments

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