R5F10366ASP datasheet(33/114 Pages) RENESAS

33 / 114 page

RL78/G12

2. ELECTRICAL SPECIFICATIONS (TA = –40 to +85°C)

R01DS0193EJ0250 Rev.2.50

Jan 17, 2025

Page 33 of 109

(3) During communication at same potential (simplified SPI (CSI) mode) (master mode, SCKp... internal clock

output)

(TA = –40 to +85°C, 1.8 V ≤ VDD ≤ 5.5 V, VSS = 0 V)

Parameter

Symbol

Conditions

HS (high-speed

main) Mode

LS (low-speed

main) Mode

Unit

MIN.

MAX.

MIN.

MAX.

SCKp cycle time

tKCY1

≥ 4/fCLK

2.7 V

≤ VDD ≤ 5.5 V

167

500

2.4 V

≤ VDD ≤ 5.5 V

250

500

1.8 V

≤ VDD ≤ 5.5 V

–

500

SCKp high-/low-level width

tKH1,

tKL1

4.0 V

≤ VDD ≤ 5.5 V

tKCY1/2–12

tKCY1/2–50

2.7 V

≤ VDD ≤ 5.5 V

tKCY1/2–18

tKCY1/2–50

2.4 V

≤ VDD ≤ 5.5 V

tKCY1/2–38

tKCY1/2–50

1.8 V

≤ VDD ≤ 5.5 V

–

tKCY1/2–50

SIp setup time (to SCKp

↑)

Note 1

tSIK1

4.0 V

≤ VDD ≤ 5.5 V

110

2.7 V

≤ VDD ≤ 5.5 V

110

2.4 V

≤ VDD ≤ 5.5 V

110

1.8 V

≤ VDD ≤ 5.5 V

–

110

SIp hold time

(from SCKp

↑) Note 2

tKSI1

Delay time from SCKp

↓ to

SOp output Note 3

tKSO1

C = 30 pF Note 4

Notes 1.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to

SCKp

↓” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from

SCKp

↓” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The delay time to SOp output

becomes “from SCKp

↑” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

C is the load capacitance of the SCKp and SOp output lines.

Caution Select the normal input buffer for the SIp pin and the normal output mode for the SOp and SCKp pins

by using port input mode register 1 (PIM1) and port output mode registers 0, 1, 4 (POM0, POM1,

POM4).

Remarks 1. p: CSI number (p = 00, 01, 11, 20), m: Unit number (m = 0, 1), n: Channel number (n = 0, 1, 3: “1, 3” is

only for the R5F102 products)

2. fMCK: Serial array unit operation clock frequency

(Operation clock to be set by the serial clock select register m (SPSm) and the CKSmn bit of serial mode

R5F102 products.))

R5F10366ASP Datasheet(PDF) 33 Page - Renesas Technology Corp

R5F10366ASP Datasheet(HTML) 33 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL