R5F10366ASP datasheet(34/114 Pages) RENESAS

34 / 114 page

RL78/G12

2. ELECTRICAL SPECIFICATIONS (TA = –40 to +85°C)

R01DS0193EJ0250 Rev.2.50

Jan 17, 2025

Page 34 of 109

(4) During communication at same potential (simplified SPI (CSI) mode) (slave mode, SCKp... external clock

input)

(TA = –40 to +85°C, 1.8 V ≤ VDD ≤ 5.5 V, VSS = 0 V)

Parameter

Symbol

Conditions

HS (high-speed

main) Mode

LS (low-speed main)

Mode

Unit

MIN.

MAX.

MIN.

MAX.

SCKp cycle time Note 5

tKCY2

4.0 V

≤ VDD ≤ 5.5 V

20 MHz < fMCK

8/fMCK

–

fMCK

≤ 20 MHz

6/fMCK

2.7 V

≤ VDD ≤ 5.5 V

16 MHz < fMCK

8/fMCK

–

fMCK

≤ 16 MHz

6/fMCK

2.4 V

≤ VDD ≤ 5.5 V

6/fMCK

and 500

6/fMCK

and 500

1.8 V

≤ VDD ≤ 5.5 V

–

6/fMCK

and 750

SCKp high-/low-level

width

tKH2,

tKL2

4.0 V

≤ VDD ≤ 5.5 V

tKCY2/2–7

2.7 V

≤ VDD ≤ 5.5 V

tKCY2/2–8

2.4 V

≤ VDD ≤ 5.5 V

tKCY2/2–18

1.8 V

≤ VDD ≤ 5.5 V

–

tKCY2/2–18

SIp setup time

(to SCKp

↑) Note 1

tSIK2

2.7 V

≤ VDD ≤ 5.5 V

1/fMCK + 20

1/fMCK + 30

2.4 V

≤ VDD ≤ 5.5 V

1/fMCK + 30

1.8 V

≤ VDD ≤ 5.5 V

–

1/fMCK + 30

SIp hold time

(from SCKp

↑) Note 2

tKSI2

1/fMCK + 31

Delay time from

SCKp

↓ to

SOp output Note 3

tKSO2

C = 30 pF Note 4

2.7 V

≤ VDD ≤ 5.5 V

2/fMCK +

110

2.4 V

≤ VDD ≤ 5.5 V

2/fMCK +

110

1.8 V

≤ VDD ≤ 5.5 V

–

2/fMCK +

110

Notes 1.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to

SCKp

↓” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from

SCKp

↓” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The delay time to SOp output

becomes “from SCKp

↑” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

C is the load capacitance of the SOp output lines.

Transfer rate in the SNOOZE mode: MAX. 1 Mbps.

Caution Select the normal input buffer for the SIp and SCKp pins and the normal output mode for the SOp pin

by using port input mode register 1 (PIM1) and port output mode registers 0, 1, 4 (POM0, POM1,

POM4).

R5F10366ASP Datasheet(PDF) 34 Page - Renesas Technology Corp

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