6402 datasheet(68/250 Pages) INTEL

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Debug and Logic Analyzer Mode

Intel® 6400/6402 Advanced Memory Buffer Datasheet

5.2

Normal Mode Debug Features

5.2.1

Normal Mode Debug Triggers

Southbound command matching/masking functionality may be available in normal AMB

operation. This can be used for triggering error injection or returning a signal in a

northbound status frame for debug/monitoring purposes for example.

5.2.2

Error Injection

Refer to the JEDEC publication: FB-DIMM Draft Specification: Design for Test, Design

for Validation (DFx) Specification for more information regarding Error Injection.

Selected errors of specific types may be injected internal to the AMB in response to

selected in-band events or by mask/match events from commands arriving at the AMB

. In the case of stuck lane errors, these are controlled directly via registers on the AMB

The AMB will also forward errors injected by the host into the SB link.

5.2.2.1

Types of Injected Errors

There are several types of errors that the AMB can inject in order to enable validation

and debug hardware and software mechanisms intended to deal with each error type in

operating systems.

5.2.2.1.1

Errors Injected in Northbound Command Register Read and Read Data Frames

In response to a selected local event, the AMB will inject an error in frame data after or

during calculating frame CRCs and transmitting the frame northbound. This is

necessary to test/validate/debug HW and SW mechanisms designed to detect and deal

with northbound channel soft (non-repeatable) channel transport errors.

Errors can be injected using the LFSR Idle pattern generator as a default.

5.2.2.1.2

Status Bits Injected in Status Block Sent Back in Response to Sync Command

In response to an FBD Sync command with R[1:0] = 2’b11, the AMB will return the

user written FBDS3 for the next status block returned in response to a Sync command.

5.2.2.1.3

Invalid Parity Injected in Status Block Sent Back in Response to Sync

Command

If the FBDS3.OVREN bit is set and FBDS3.USRPAR contains invalid parity for the data in

FBDS3.USRVAL, the in response to an FBD Sync command with R[1:0] = 2’b11 and,

the AMB will cause invalid parity to be passed in the next status a block returned in

response to a Sync command.

5.2.2.1.4

Force Alert

In response to a selected local event, the AMB will force the beginning of alerts

northbound. An error status bit indicating an injected alert error as the source will also

be set. This error may be created by artificially corrupting CRC on the frame whose

timing matches the error injection. This may have the same side effects as corrupting

the CRC but will have a different error status. The beginning of alerts northbound will

begin with the frame that would match read return slot for the corrupted frame.

For the Intel 6400/6402 Advanced Memory Buffer, the alert takes place 2 to 3 clocks

after the NB response for the SB frame that caused the trigger

6402 Datasheet(PDF) 68 Page - Intel Corporation

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