6402 datasheet(17/250 Pages) INTEL

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Intel® 6400/6402 Advanced Memory Buffer Datasheet

FBD Channel Interface

2.1

Intel 6400/6402 Advanced Memory Buffer (AMB)

Support for FBD Operating Modes

The AMB may not support all operating modes documented in the FB-DIMM

Architecture and Protocol Specification [1]. The following list defines which features/

modes are supported:

• 14 lane northbound (NB) with and without single lane Fail Over

• 13 lane NB with and without single lane Fail Over

• 10 lane southbound (SB) with and without single lane Fail Over

• Repeater mode

• LAI mode (optional feature supported in the Intel AMB)

• Transparent mode

• Recalibrate state

The following are optional FBD features not supported in the AMB:

• 12 lane NB non-ECC

• L0s low power state

• Data mask

• Variable read latency

2.2

Channel Initialization

Refer to Chapter 3, “Channel Initialization” in the FB DIMM Architecture and Protocol

Specification [1] for FBD initialization protocol. The reset chapter covers some

additional details about the initialization process.

2.3

Channel Protocol

2.3.1

General

Refer to Chapter 4, “Channel Protocol” in the FB DIMM Architecture and Protocol

Specification [1] for FBD protocol.

2.3.2

Timeouts During TS0

The FBDLOCKTO register is used to help the AMB determine when to give up waiting for

individual lanes to bit lock. The NBLINKCFG field is used to communicate when lanes

are intentionally not in use. The BLTOCNT field is used to set a time out on waiting for a

lane to bit lock. Lanes not bit locked by this time will be marked as failed.

6402 Datasheet(PDF) 17 Page - Intel Corporation