6402 datasheet(41/250 Pages) INTEL

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Intel® 6400/6402 Advanced Memory Buffer Datasheet

Electrical, Power, and Thermal

Table 4-4 contains the AMB Power Specification Parameters for the Advanced Memory

Buffer part in normal mode.

Table 4-4.

Power Values for x4 DIMMs (Sheet 1 of 3)

533 MHz

667 MHz

Symbol

Conditions

Power

Supply

Thermal

Design

Max

Current

Thermal

Design

Max

Current

Units

Idd_Idle_0

Idle Current, single or last

DIMM

L0 state, idle (0 BW)

Primary channel enabled,

Secondary Channel Disabled

CKE high. Command and

address lines stable.

DRAM clock active.

@1.5 V

2.1

2.2

2.4

2.6

@1.8 V

0.9

@3.3 V

Idd_Idle_0 Total Power

3.9

4.4

Idd_Idle_1

Idle Current, first DIMM

L0 state, idle (0 BW)

Primary and Secondary

channels enabled

CKE high. Command and

address lines stable.

DRAM clock active.

@1.5 V

2.7

3.0

3.1

3.4

@1.8 V

0.9

@3.3 V

Idd_Idle_1 Total Power

4.9

5.5

Idd_TDP_0

(for AMB

spec, Not in

SPD)

Active Power, TDP BW, Single

or Last DIMM

L0 state

TDP Channel BW = 2.0GB/

s@533; 2.4GB/s@667;

DIMM BW = 2.0GB/s@533;

2.4GB/s@667;

67% read, 33% write.

Primary channel Enabled

Secondary channel Disabled

CKE high. Command and

Address

@1.5 V

2.4

2.6

2.8

3.0

@1.8 V

1.5

1.6

1.5

1.6

@3.3 V

Idd_TDP_0 Total Power

5.9

6.5

Idd_TDP_1

(for AMB

spec, Not in

SPD)

Active Power, TDP BW, First

DIMM

L0 state

TDP Channel BW = 2.0GB/

s@533; 2.4GB/s@667;

DIMM BW =2/3 Channel BW =

1.3GB/s@533; 1.6GB/s@667;

67% read, 33% write.

Primary channel Enabled

Secondary channel Enabled

CKE high. Command and Ad

@1.5 V

3.0

3.3

3.5

3.8

@1.8 V

1.3

1.4

1.3

1.4

@3.3 V

Idd_TDP_1 Total Power

6.3

6.9

Idd_Active_

Active Power

L0 state.

50% DRAM BW, 67% read,

33% write.

Primary and Secondary

channels enabled.

DRAM clock active, CKE high.

@1.5 V

3.1

3.4

3.6

3.9

@1.8 V

1.6

1.7

1.6

1.7

@3.3 V

Idd_Active_1 Total Power

6.9

7.6

6402 Datasheet(PDF) 41 Page - Intel Corporation

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