SC28L201 datasheet(34/110 Pages) NXP

34 / 110 page

9397 750 13138

Product data sheet

Rev. 01 — 31 October 2005

34 of 110

Philips Semiconductors

SC28L201

3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

11 — Auto Rx and Tx control. Receiver commands Tx to send Xoff as the receiver ﬁlls

and commands the Tx to send Xon when Rx FIFO ﬁll level is lowered. This results in total

automatic control. No processor interrupt is required.

Note that MR3[7] controls the stripping of Xoff/Xon characters.

0 — Xon/Xoff characters are sent to the Rx FIFO

1 — Xon/Xoff characters are discarded

The MR3[7] functions regardless of the setting of MR3[3:2]. This allows for general

purpose character recognition and processing (see Section 7.4.9.1 “Character stripping”).

7.4.10.2

Xon/Xoff characters

The programming of these characters is usually done individually. The standard Xon/Xoff

characters are: Xon is 0x11, Xoff 0x13. Any enabling of the Xon/Xoff functions will use the

contents of the Xon and Xoff character registers as the basis on which recognition is

predicated.

7.4.10.3

Host mode (least efﬁcient)

When neither the auto-receiver or auto-transmitter modes are set, the Xon/Xoff logic is

operating in the host mode. In host mode, all activity of the Xon/Xoff logic is initiated by

commands to the CRx. The Xoff command forces the transmitter to disable exactly as

though an Xoff character had been received by the RxFIFO. The transmitter will remain

disabled until the chip is reset or the CR[7:3] = 1 0110 (Xoff resume) command is given. In

particular, reception of an Xon or disabling or re-enabling the transmitter will not cause

resumption of transmission. Redundant CRTXxx commands, that is ‘CRTXon, CRTXon’,

are harmless, although they waste time. A CRTXon may be used to cancel a CRTXoff

(and vice versa) but both may be transmitted depending on the command timing with

respect to that of the transmitter state machine.

7.4.10.4

Auto-transmitter mode

When a channel receiver loads an Xoff character into the RxFIFO, the channel transmitter

will ﬁnish transmission of the current character and then stop transmitting. A transmitter so

idled can be restarted by the receipt of an Xon character by the receiver or by a hardware

or software reset. The last option results in the loss of the un-transmitted contents of the

TxFIFO. When in this mode and waiting for an Xon signal from the receiver, the CR

(Command Register) commands for the transmitter are not effective.

While idle in this mode and waiting for an Xon signal from the receiver, data may be

written to the TxFIFO and it continue to present its ﬁll level to the interrupt arbiter and

maintains the integrity of its status registers.

Use of ‘00’ as an Xon/Xoff character is complicated by the Receiver break operation which

loads a ‘00’ character on the RxFIFO. The Xon/Xoff character detectors do not

discriminate in this case from an Xon/Xoff character received through the RXD pin.

Remark: To be recognized as an Xon or Xoff character, the receiver must have room in

the RxFIFO to accommodate the character. An Xon/Xoff character that is received

resulting in a receiver overrun does not effect the transmitter nor is it loaded into the

RxFIFO, regardless of the state of the Xon/Xoff transparency bit, MR3[7].

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