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SC28L201 Datasheet(PDF) 110 Page - NXP Semiconductors |
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SC28L201 Datasheet(HTML) 110 Page - NXP Semiconductors |
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110 / 110 page  © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 31 October 2005 Document number: 9397 750 13138 Published in The Netherlands Philips Semiconductors SC28L201 3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO 8.2.8 Interrupt Status Register (ISR) . . . . . . . . . . . . 56 8.2.9 Interrupt Mask Register (IMR) . . . . . . . . . . . . 58 8.2.10 Receiver FIFO (RxFIFO) . . . . . . . . . . . . . . . . 59 8.2.11 Transmitter FIFO (TxFIFO) . . . . . . . . . . . . . . . 59 8.2.12 Receiver FIFO Interrupt Level (RxFIL) . . . . . . 59 8.2.13 Receiver FIFO Fill Level register (RxFL) . . . . 60 8.2.14 Transmitter FIFO Interrupt Level (TxFIL) . . . . 60 8.2.15 Transmitter FIFO Empty Level register (TxEL) 60 8.3 Registers for character recognition . . . . . . . . . 61 8.3.1 Xon Character Register (XonCR) . . . . . . . . . . 61 8.3.2 Xoff Character Register (XoffCR) . . . . . . . . . . 61 8.3.3 Address Recognition Character Register (ARCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 8.3.4 Xon/Xoff Interrupt Status Register (XISR) . . . 62 8.3.5 Watchdog, Character, Address and X Enable Register (WCXER) . . . . . . . . . . . . . . . . . . . . . 63 8.4 Programmable counters, timers, and baud rate generators. . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 8.4.1 Programmable BRG Timer Reload Registers, Upper 0 and Upper 1 (PBRGPU) . . . . . . . . . . 64 8.4.2 Programmable BRG Timer Reload Registers, Lower 0 and Lower 1 (PBRGPL) . . . . . . . . . . 64 8.4.3 Counter/Timer clock source (CTCS0 and CTCS1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 8.4.4 Counter Timer Value Registers, Upper 0 and Upper 1 (CTVU0, CTVU1) . . . . . . . . . . . . . . . 66 8.4.5 Counter Timer Value Registers, Lower 0 and Lower 1 (CTVL0, CTVL1) . . . . . . . . . . . . . . . . 66 8.4.6 Programmable BRG Clock Source, 0 and 1 (PBRGCS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 8.4.7 Counter/Timer Preset Upper and Counter/Timer Preset Lower (CTPU, CTPL) . . . . . . . . . . . . . 67 8.4.8 The CTS, RTS, CTS Enable Tx signals . . . . . 68 8.5 Registers of the Arbitrating Interrupt system and bidding control . . . . . . . . . . . . . . . . . . . . . 69 8.5.1 Interrupt Control Register (ICR) . . . . . . . . . . . 69 8.5.2 Update CIR (UCIR): the most important command for polled or interrupt service . . . . . 69 8.5.3 Current Interrupt Register (CIR) . . . . . . . . . . . 70 8.5.4 Interrupt Vector Register (IVR) . . . . . . . . . . . . 71 8.5.5 Global Interrupting Channel Register (GICR) . 71 8.5.6 Global Interrupting Byte Count Register (GIBCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 8.5.7 Global Interrupting Type Register (GITR) . . . . 72 8.5.8 Global RxFIFO register (GRxFIFO) . . . . . . . . 72 8.5.9 Global TxFIFO register (GTxFIFO). . . . . . . . . 72 8.5.10 Bidding Control Register, Break Change (BCRBRK) . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 8.5.11 Bidding Control Register, Change-Of-State (BCRCOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 8.5.12 Bidding Control Register, Xon/Xoff (BCRx) . . 73 8.5.13 Bidding Control Register, Address (BCRA) . . 73 8.5.14 Bidding Control Register, C/T 0 and C/T 1 (BCR C/T) . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 8.5.15 Bidding Control Register, Received Loopback Error (BCRLBE) . . . . . . . . . . . . . . . . . . . . . . . 73 8.6 Registers of the I/O ports . . . . . . . . . . . . . . . . 74 8.6.1 Input Port Change Register Lower Nibble, A (IPCRL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 8.6.2 Input Port Change Register Lower Nibble, B (IPCRL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 8.6.3 Input Port Change Register Upper Nibble, A (IPCRU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 8.6.4 Input Port Change Register Upper Nibble, B (IPCRU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 8.6.5 Input Port Register, A (IPR) . . . . . . . . . . . . . . 77 8.6.6 Input Port Register, B (UPT) . . . . . . . . . . . . . 77 8.6.7 Input Change Detect Enable, A (IPCE) . . . . . 78 8.6.8 Input Change Detect Enable, B (IPCE) . . . . . 79 8.6.9 I/O Port Configuration Registers (I/OPCR0, I/OPCR1, I/OPCR2, I/OPCR3) . . . . . . . . . . . . 79 8.6.10 Set the Output Port Bits OPR A and OPR B (SOPR A and SOPR B) . . . . . . . . . . . . . . . . . 82 8.6.11 Reset Output Port bits OPR A and OPR B (ROPR A, ROPR B) . . . . . . . . . . . . . . . . . . . . 83 8.6.12 Output Port Register A and B (OPR) . . . . . . 84 8.7 BRG characteristics . . . . . . . . . . . . . . . . . . . . 85 9 Register maps . . . . . . . . . . . . . . . . . . . . . . . . . 86 10 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 90 11 Static characteristics . . . . . . . . . . . . . . . . . . . 91 12 Dynamic characteristics . . . . . . . . . . . . . . . . . 93 12.1 Timing diagrams. . . . . . . . . . . . . . . . . . . . . . . 96 13 Test information. . . . . . . . . . . . . . . . . . . . . . . 103 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . 104 15 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 15.1 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 15.2 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . 105 15.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . 105 15.4 Manual soldering . . . . . . . . . . . . . . . . . . . . . 106 15.5 Package related soldering information . . . . . 106 16 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . 107 17 Revision history . . . . . . . . . . . . . . . . . . . . . . 107 18 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 108 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 108 21 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 108 22 Contact information . . . . . . . . . . . . . . . . . . . 108 |
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