ADSP-BF607 datasheet(64/112 Pages) AD

64 / 112 page

Rev. 0

Page 64 of 112

June 2013

ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609

Synchronous Burst Flash Read

Table 31. Synchronous Burst AC Timing (BxMODE = b#11)

VDD_EXT

1.8V/3.3V Nominal

Parameter

Min

Max

Unit

Timing Requirements

tNDS

DATA-In Setup Before SMC0_NORCLK High

tNDH

DATA-In Hold After SMC0_NORCLK High

1.5

tNWS

WAIT-In Setup Before SMC0_NORCLK High

tNWH

WAIT-In Hold After SMC0_NORCLK High

1.5

Switching Characteristics

tNRCLS

NOR_CLK Low Period

1, 2

[0.5 × BCLK × tSCLK0 – 1] or [7]

tNRCHS

NOR_CLK High Period

1, 2

[0.5 × BCLK × tSCLK0 – 1] or [7]

tNRCLK

NOR_CLK Period1, 2

[BCLK × tSCLK0 – 1] or [15]

tNDO

Output Delay After SMC0_NORCLK High3

6ns

tNHO

Output Hold After SMC0_NORCLK High3

0.8

1 Whichever is greater.

2 BCLKDIV value set using the SMC_BxCTL.BCLK bits. BCLKDIV = (SMC_BxCTL.BCLK + 1).

3 Output = SMC0_Ax (address), SMC0_NORDV, SMC0_ARE, SMC0_AMSx (N0R_CE).

Figure 15. Synchronous Burst AC Interface Timing

tNDO

tNWS

tNWH

tNDH

tNDS

tNHO

Dn+1

Dn+2

Dn+3

SMC0_AMSx

SMC0_NORCLK

SMC0_Ax

(ADDRESS)

SMC0_ARE

NOR_OE

NOTE: SMC0_NORCLK dotted line represents a free running version

of SMC0_NORCLK that is not visible on the SMC0_NORCLK pin.

SMC0_ABE1-0

SMC0_Dx

(DATA)

SMC0_NORDV

SMC0_AOE

SMC0_NORWT

tNDO

tNHO

tNRCLS

tNRCLK

tNRCHS

ADSP-BF607 Datasheet(PDF) 64 Page - Analog Devices

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