ADSP-BF607 datasheet(87/112 Pages) AD

87 / 112 page

Rev. 0

Page 87 of 112

June 2013

ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609

Serial Peripheral Interface (SPI) Port—SPI_RDY Slave

Timing

Table 53. SPI Port—SPI_RDY Slave Timing

VDD_EXT

1.8 V/3.3V Nominal

Parameter

Min

Max

Unit

Switching Characteristics

tDSPISCKRDYSR

SPI_RDY De-assertion from Valid Input SPI_CLK Edge in Slave Mode Receive

2.5 × tSCLK1

3.5 × tSCLK1 + 17.5 ns

tDSPISCKRDYST

SPI_RDY De-assertion from Valid Input SPI_CLK Edge in Slave Mode Transmit

3.5 × tSCLK1

4.5 × tSCLK1 + 17.5 ns

Figure 37. SPI_RDY De-assertion from Valid Input SPI_CLK Edge in Slave Mode Receive (FCCH = 0)

Figure 38. SPI_RDY De-assertion from Valid Input SPI_CLK Edge in Slave Mode Transmit (FCCH = 1)

SPI_CLK

(CPOL = 0)

SPI_CLK

(CPOL = 1)

tDSPISCKRDYSR

SPI_RDY (O)

SPI_CLK

(CPOL = 0)

SPI_CLK

(CPOL = 1)

CPHA = 1

CPHA = 0

SPI_CLK

(CPOL = 1)

SPI_CLK

(CPOL = 0)

tDSPISCKRDYST

SPI_RDY (O)

SPI_CLK

(CPOL = 1)

SPI_CLK

(CPOL = 0)

CPHA = 1

CPHA = 0

ADSP-BF607 Datasheet(PDF) 87 Page - Analog Devices

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