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TAS5760LDAPR Datasheet(PDF) 39 Page - Texas Instruments |
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TAS5760LDAPR Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 77 page  TAS5760L www.ti.com SLOS782B – JULY 2013 – REVISED SEPTEMBER 2015 Channel Selection for PBTL Mode [1] (R/W) 01010001 When placed in PBTL mode, the audio information from the Right channel of the serial audio input stream is used by - - - - - - 0 - the speaker amplifier When placed in PBTL mode, the audio information from the Left channel of the serial audio input stream is used by the - - - - - - 1 - speaker amplifier Reserved [0] (R/W) 01010001 This control is reserved and must not be changed from its default setting. - - - - - - - - 9.5.2.8 Reserved (7 / 0x07) Reserved [7:0] (R/W) 00000000 Reserved - - - - - - - - 9.5.2.9 Fault Configuration and Error Status (8 / 0x08) Reserved [7:6] (R) 00000000 This control is reserved and must not be changed from its default setting. - - - - - - - - OCE Threshold [5:4] (R) 00000000 Threshold is set to the default level specified in the electrical characteristics table - - 0 0 - - - - Threshold is reduced to 75% of the evel specified in the electrical characteristics table - - 0 1 - - - - Threshold is reduced to 50% of the evel specified in the electrical characteristics table - - 1 0 - - - - Threshold is reduced to 25% of the evel specified in the electrical characteristics table - - 1 1 - - - - Clock Error Status [3] (R) 1000 0 000 Clocks are valid and no error is currently detected - - - - 0 - - - A clock error is occuring (This error is non-latching, so intermittent clock errors will be cleared when clocks re-enter valid state and the device will resume normal operation automatically. This bit will likewise be cleared once normal - - - - 1 - - - operation resumes.) Over Current Error Status[2] (R) 10000 0 00 The output current levels of the speaker amplifier outputs are below the OCE threshold - - - - - 0 - - The DC offset level of the outputs has exceeded the OCE threshold, causing an error (This is a latching error and SPK_SD must be toggled after an OCE event for the device to resume normal operation. This bit will remain HIGH until - - - - - 1 - - SPK_SD is toggled.) Output DC Error Status [1] (R) 100000 0 0 The DC offset level of the speaker amplifier outputs are below the DCE threshold - - - - - - 0 - The DC offset level of the speaker amplifier outputs has exceeded the DCE threshold, causing an error (This is a latching error and SPK_SD must be toggled after an DCE event for the device to resume normal operation. This bit will - - - - - - 1 - remain HIGH until SPK_SD is toggled.) Over-Temperature Error Status[1] (R) 1000000 0 A clock error will occur if SCLK is stopped - - - - - - - 0 The temperature of the die has exceeded the level specified in the electrical characteristics table. (This is a latching error and SPK_SD must be toggled for the device to resume normal operation. This bit will remain HIGH until SPK_SD - - - - - - - 1 is toggled.) Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 39 Product Folder Links: TAS5760L |
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