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TNETV1647GSTZWT Datasheet(PDF) 197 Page - Texas Instruments |
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TNETV1647GSTZWT Datasheet(HTML) 197 Page - Texas Instruments |
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197 / 236 page  TMS320DM6441 www.ti.com SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010 6.16 Serial Port Interface (SPI) The DM6441 SPI peripheral provides a programmable length shift register which allows serial communication with other SPI devices through a 3- or 4-wire interface. The SPI supports the following features: • Master mode operation • Two chip selects for interfacing to multiple slave SPI devices. • 3- or 4-wire interface The SPI registers are shown in Table 6-74. 6.16.1 SPI Peripheral Register Description(s) Table 6-74. SPI Register Descriptions HEX ADDRESS RANGE ACRONYM REGISTER NAME 0x01C6 6800 SPIGCR0 SPI Global Control Register 0 0x01C6 6804 SPIGCR1 SPI Global Control Register 1 0x01C6 6808 SPIINT SPI Interrupt Register 0x01C6 680C SPILVL SPI Interrupt Level Register 0x01C6 6810 SPIFLG SPI Flag Status Register 0x01C6 6814 SPIPC0 SPI Pin Control Register 0 0x01C6 6818 – Reserved 0x01C6 681C SPIPC2 SPI Pin Control Register 2 0x01C6 6820 - 0x01C6 6838 – Reserved 0x01C6 683C SPIDAT1 SPI Shift Register 1 0x01C6 6840 SPIBUF SPI Buffer Register 0x01C6 6844 SPIEMU SPI Emulation Register 0x01C6 6848 SPIDELAY SPI Delay Register 0x01C6 684C SPIDEF SPI Default Chip Select Register 0x01C6 6850 SPIFMT0 SPI Data Format Register 0 0x01C6 6854 SPIFMT1 SPI Data Format Register 1 0x01C6 6858 SPIFMT2 SPI Data Format Register 2 0x01C6 685C SPIFMT3 SPI Data Format Register 3 0x01C6 6860 INTVEC0 SPI Interrupt Vector Register 0 0x01C6 6864 INTVEC1 SPI Interrupt Vector Register 1 0x01C6 6868 - 0x01C6 6FFF Reserved Copyright © 2006–2010, Texas Instruments Incorporated Peripheral and Electrical Specifications 197 Submit Documentation Feedback Product Folder Link(s): TMS320DM6441 |
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