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TNETV1647GSTZWT Datasheet(PDF) 37 Page - Texas Instruments

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Part # TNETV1647GSTZWT
Description  Digital Media System-on-Chip
PDF  236 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV1647GSTZWT Datasheet(HTML) 37 Page - Texas Instruments

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TMS320DM6441
www.ti.com
SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010
Table 2-10. DDR2 Memory Controller Terminal Functions (continued)
SIGNAL
TYPE(1)
OTHER(2) (3)
DESCRIPTION
NAME
NO.
DDR_D[31]
U19
DDR_D[30]
V19
DDR_D[29]
W18
DDR_D[28]
V18
DDR_D[27]
W17
DDR_D[26]
U18
DDR_D[25]
U17
DDR_D[24]
V17
DDR_D[23]
T17
DDR_D[22]
V16
DDR_D[21]
W16
DDR_D[20]
U15
DDR_D[19]
V15
DDR_D[18]
W15
DDR_D[17]
V14
DDR_D[16]
W14
I/O/Z
DVDDR2
DDR2 data bus can be configured as 32-bits wide or 16-bits wide.
DDR_D[15]
V7
DDR_D[14]
W6
DDR_D[13]
V6
DDR_D[12]
W5
DDR_D[11]
V5
DDR_D[10]
U5
DDR_D[9]
W4
DDR_D[8]
V4
DDR_D[7]
W3
DDR_D[6]
V3
DDR_D[5]
U3
DDR_D[4]
W2
DDR_D[3]
V2
DDR_D[2]
V1
DDR_D[1]
U2
DDR_D[0]
U1
DDR_VREF
T15
I
(4)
Reference voltage input for the SSTL_18 IO buffers.
DDR_VSSDLL
T11
GND
(4)
Ground for the DDR2 digital locked loop.
DDR_VDDDLL
T10
S
(4)
Power (1.8 Volts) for the DDR2 digital locked loop.
Impedance control for DDR2 outputs. This must be connected via a 200
Ω resistor
DDR_ZN
T12
O/Z
(4)
to DVDDR2.
Impedance control for DDR2 outputs. This must be connected via a 200
Ω resistor
DDR_ZP
T13
O/Z
(4)
to VSS.
(4)
For more information, see Section 5.2, Recommended Operating Conditions.
Copyright © 2006–2010, Texas Instruments Incorporated
Device Overview
37
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Product Folder Link(s): TMS320DM6441



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