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TNETV1647GSTZWT Datasheet(PDF) 86 Page - Texas Instruments |
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TNETV1647GSTZWT Datasheet(HTML) 86 Page - Texas Instruments |
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86 / 236 page  TMS320DM6441 SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010 www.ti.com 3.6 Emulation Control The flexibility of the DM6441 architecture allows either the ARM or DSP to control the various peripherals (setup registers, service interrupts, etc.). While this assignment is purely a matter of software convention, during an emulation halt it is necessary for the device to know which peripherals are associated with the halting processor so that only those modules receive the suspend signal. This allows peripherals associated with the other (unhalted) processor to continue normal operation. The SUSPSRC register indicates the emulation suspend source for those peripherals which support emulation suspend. The SUSPSRC register format is shown in Figure 3-9. Brief details on the peripherals which correspond to the register bits is given in Table 3-34. When the associated SUSPSRC bit is ‘0’, the peripheral’s emulation suspend signal is controlled by the ARM emulator and when set to ‘1’ it is controlled by the DSP emulator. Figure 3-9. Emulation Suspend Source Register (SUSPSRC) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 VICP VICP TIMR2 TIMR1 TIMR0 GPIO PWM2 PWM1 PWM0 SPI UART2 UART1 UART0 I2C ASP RSV SRC EN SRC SRC SRC SRC SRC SRC SRC SRC SRC SRC SRC SRC SRC R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0 15 13 12 11 10 9 8 6 5 4 0 HPI USB EMAC RESERVED RESERVED RESERVED RESERVED SRC SRC SRC R-000 R/W-0 R-00 R/W-0 R-0 00 R/W-0 R-0 0000 LEGEND: R = Read, W = Write, n = value at reset Table 3-34. SUSPSRC Register Descriptions Bit Name Description 31 VICPSRC Video Imaging Coprocessor emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 30 VICPEN Video Imaging Coprocessor emulation suspend enable 0 = Emulation suspend ignored by VICP 1 = VICP emulation suspend enabled 29 TIMR2SRC Timer2 (WD Timer) emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 28 TIMR1SRC Timer1 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 27 TIMR0SRC Timer0 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 26 GPIOSRC GPIO emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 25 PWM2SRC PWM2 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 24 PWM1SRC PWM1 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 23 PWM0SRC PWM0 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 22 SPISRC SPI emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 21 UART2SRC UART2 emulation suspend source 0 = ARM emulation suspend 1 = DSP emulation suspend 86 Device Configurations Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM6441 |
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